blob: b24fdb42068813bff2c30fec2584ca9535670272 [file] [log] [blame]
// Copyright (c) 2021, the Dart project authors. Please see the AUTHORS file
// for details. All rights reserved. Use of this source code is governed by a
// BSD-style license that can be found in the LICENSE file.
#include "vm/globals.h" // Needed here to get TARGET_ARCH_RISCV.
#if defined(TARGET_ARCH_RISCV32) || defined(TARGET_ARCH_RISCV64)
#include "vm/compiler/backend/il.h"
#include "vm/compiler/backend/flow_graph.h"
#include "vm/compiler/backend/flow_graph_compiler.h"
#include "vm/compiler/backend/locations.h"
#include "vm/compiler/backend/locations_helpers.h"
#include "vm/compiler/backend/range_analysis.h"
#include "vm/compiler/ffi/native_calling_convention.h"
#include "vm/compiler/jit/compiler.h"
#include "vm/dart_entry.h"
#include "vm/instructions.h"
#include "vm/object_store.h"
#include "vm/parser.h"
#include "vm/simulator.h"
#include "vm/stack_frame.h"
#include "vm/stub_code.h"
#include "vm/symbols.h"
#include "vm/type_testing_stubs.h"
#define __ (compiler->assembler())->
#define Z (compiler->zone())
namespace dart {
// Generic summary for call instructions that have all arguments pushed
// on the stack and return the result in a fixed register A0 (or FA0 if
// the return type is double).
LocationSummary* Instruction::MakeCallSummary(Zone* zone,
const Instruction* instr,
LocationSummary* locs) {
ASSERT(locs == nullptr || locs->always_calls());
LocationSummary* result =
((locs == nullptr)
? (new (zone) LocationSummary(zone, 0, 0, LocationSummary::kCall))
: locs);
const auto representation = instr->representation();
switch (representation) {
case kTagged:
result->set_out(
0, Location::RegisterLocation(CallingConventions::kReturnReg));
break;
case kUnboxedInt64:
#if XLEN == 32
result->set_out(
0, Location::Pair(
Location::RegisterLocation(CallingConventions::kReturnReg),
Location::RegisterLocation(
CallingConventions::kSecondReturnReg)));
#else
result->set_out(
0, Location::RegisterLocation(CallingConventions::kReturnReg));
#endif
break;
case kUnboxedDouble:
result->set_out(
0, Location::FpuRegisterLocation(CallingConventions::kReturnFpuReg));
break;
default:
UNREACHABLE();
break;
}
return result;
}
LocationSummary* LoadIndexedUnsafeInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
const intptr_t kNumTemps = 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::RequiresRegister());
switch (representation()) {
case kTagged:
locs->set_out(0, Location::RequiresRegister());
break;
case kUnboxedInt64:
#if XLEN == 32
locs->set_out(0, Location::Pair(Location::RequiresRegister(),
Location::RequiresRegister()));
#else
locs->set_out(0, Location::RequiresRegister());
#endif
break;
case kUnboxedDouble:
locs->set_out(0, Location::RequiresFpuRegister());
break;
default:
UNREACHABLE();
break;
}
return locs;
}
void LoadIndexedUnsafeInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
ASSERT(RequiredInputRepresentation(0) == kTagged); // It is a Smi.
ASSERT(kSmiTag == 0);
ASSERT(kSmiTagSize == 1);
const Register index = locs()->in(0).reg();
switch (representation()) {
case kTagged: {
const auto out = locs()->out(0).reg();
__ slli(TMP, index, kWordSizeLog2 - kSmiTagSize);
__ add(TMP, TMP, base_reg());
__ LoadFromOffset(out, TMP, offset());
break;
}
case kUnboxedInt64: {
#if XLEN == 32
const auto out_lo = locs()->out(0).AsPairLocation()->At(0).reg();
const auto out_hi = locs()->out(0).AsPairLocation()->At(1).reg();
__ slli(TMP, index, kWordSizeLog2 - kSmiTagSize);
__ add(TMP, TMP, base_reg());
__ LoadFromOffset(out_lo, TMP, offset());
__ LoadFromOffset(out_hi, TMP, offset() + compiler::target::kWordSize);
#else
const auto out = locs()->out(0).reg();
__ slli(TMP, index, kWordSizeLog2 - kSmiTagSize);
__ add(TMP, TMP, base_reg());
__ LoadFromOffset(out, TMP, offset());
#endif
break;
}
case kUnboxedDouble: {
const auto out = locs()->out(0).fpu_reg();
__ slli(TMP, index, kWordSizeLog2 - kSmiTagSize);
__ add(TMP, TMP, base_reg());
__ LoadDFromOffset(out, TMP, offset());
break;
}
default:
UNREACHABLE();
break;
}
}
DEFINE_BACKEND(StoreIndexedUnsafe,
(NoLocation, Register index, Register value)) {
ASSERT(instr->RequiredInputRepresentation(
StoreIndexedUnsafeInstr::kIndexPos) == kTagged); // It is a Smi.
__ slli(TMP, index, compiler::target::kWordSizeLog2 - kSmiTagSize);
__ add(TMP, TMP, instr->base_reg());
__ sx(value, compiler::Address(TMP, instr->offset()));
ASSERT(kSmiTag == 0);
}
DEFINE_BACKEND(TailCall,
(NoLocation,
Fixed<Register, ARGS_DESC_REG>,
Temp<Register> temp)) {
compiler->EmitTailCallToStub(instr->code());
// Even though the TailCallInstr will be the last instruction in a basic
// block, the flow graph compiler will emit native code for other blocks after
// the one containing this instruction and needs to be able to use the pool.
// (The `LeaveDartFrame` above disables usages of the pool.)
__ set_constant_pool_allowed(true);
}
LocationSummary* MemoryCopyInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 5;
const intptr_t kNumTemps = 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(kSrcPos, Location::WritableRegister());
locs->set_in(kDestPos, Location::WritableRegister());
locs->set_in(kSrcStartPos, Location::RequiresRegister());
locs->set_in(kDestStartPos, Location::RequiresRegister());
locs->set_in(kLengthPos, Location::WritableRegister());
return locs;
}
void MemoryCopyInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
const Register src_reg = locs()->in(kSrcPos).reg();
const Register dest_reg = locs()->in(kDestPos).reg();
const Register src_start_reg = locs()->in(kSrcStartPos).reg();
const Register dest_start_reg = locs()->in(kDestStartPos).reg();
const Register length_reg = locs()->in(kLengthPos).reg();
EmitComputeStartPointer(compiler, src_cid_, src_start(), src_reg,
src_start_reg);
EmitComputeStartPointer(compiler, dest_cid_, dest_start(), dest_reg,
dest_start_reg);
compiler::Label loop, done;
// Untag length and skip copy if length is zero.
__ SmiUntag(length_reg);
__ beqz(length_reg, &done);
__ Bind(&loop);
switch (element_size_) {
case 1:
__ lb(TMP, compiler::Address(src_reg));
__ addi(src_reg, src_reg, 1);
__ sb(TMP, compiler::Address(dest_reg));
__ addi(dest_reg, dest_reg, 1);
break;
case 2:
__ lh(TMP, compiler::Address(src_reg));
__ addi(src_reg, src_reg, 2);
__ sh(TMP, compiler::Address(dest_reg));
__ addi(dest_reg, dest_reg, 2);
break;
case 4:
__ lw(TMP, compiler::Address(src_reg));
__ addi(src_reg, src_reg, 4);
__ sw(TMP, compiler::Address(dest_reg));
__ addi(dest_reg, dest_reg, 4);
break;
case 8:
#if XLEN == 32
__ lw(TMP, compiler::Address(src_reg, 0));
__ lw(TMP2, compiler::Address(src_reg, 4));
__ addi(src_reg, src_reg, 16);
__ sw(TMP, compiler::Address(dest_reg, 0));
__ sw(TMP2, compiler::Address(dest_reg, 4));
__ addi(dest_reg, dest_reg, 16);
#else
__ ld(TMP, compiler::Address(src_reg));
__ addi(src_reg, src_reg, 8);
__ sd(TMP, compiler::Address(dest_reg));
__ addi(dest_reg, dest_reg, 8);
#endif
break;
case 16:
#if XLEN == 32
__ lw(TMP, compiler::Address(src_reg, 0));
__ lw(TMP2, compiler::Address(src_reg, 4));
__ sw(TMP, compiler::Address(dest_reg, 0));
__ sw(TMP2, compiler::Address(dest_reg, 4));
__ lw(TMP, compiler::Address(src_reg, 8));
__ lw(TMP2, compiler::Address(src_reg, 12));
__ addi(src_reg, src_reg, 16);
__ sw(TMP, compiler::Address(dest_reg, 8));
__ sw(TMP2, compiler::Address(dest_reg, 12));
__ addi(dest_reg, dest_reg, 16);
#elif XLEN == 64
__ ld(TMP, compiler::Address(src_reg, 0));
__ ld(TMP2, compiler::Address(src_reg, 8));
__ addi(src_reg, src_reg, 16);
__ sd(TMP, compiler::Address(dest_reg, 0));
__ sd(TMP2, compiler::Address(dest_reg, 8));
__ addi(dest_reg, dest_reg, 16);
#elif XLEN == 128
__ lq(TMP, compiler::Address(src_reg));
__ addi(src_reg, src_reg, 16);
__ sq(TMP, compiler::Address(dest_reg));
__ addi(dest_reg, dest_reg, 16);
#endif
break;
}
__ subi(length_reg, length_reg, 1);
__ bnez(length_reg, &loop);
__ Bind(&done);
}
void MemoryCopyInstr::EmitComputeStartPointer(FlowGraphCompiler* compiler,
classid_t array_cid,
Value* start,
Register array_reg,
Register start_reg) {
if (IsTypedDataBaseClassId(array_cid)) {
__ lx(array_reg,
compiler::FieldAddress(array_reg,
compiler::target::PointerBase::data_offset()));
} else {
switch (array_cid) {
case kOneByteStringCid:
__ addi(
array_reg, array_reg,
compiler::target::OneByteString::data_offset() - kHeapObjectTag);
break;
case kTwoByteStringCid:
__ addi(
array_reg, array_reg,
compiler::target::OneByteString::data_offset() - kHeapObjectTag);
break;
case kExternalOneByteStringCid:
__ lx(array_reg,
compiler::FieldAddress(array_reg,
compiler::target::ExternalOneByteString::
external_data_offset()));
break;
case kExternalTwoByteStringCid:
__ lx(array_reg,
compiler::FieldAddress(array_reg,
compiler::target::ExternalTwoByteString::
external_data_offset()));
break;
default:
UNREACHABLE();
break;
}
}
intptr_t shift = Utils::ShiftForPowerOfTwo(element_size_) - 1;
if (shift < 0) {
__ srai(TMP, start_reg, -shift);
__ add(array_reg, array_reg, TMP);
} else if (shift == 0) {
__ add(array_reg, array_reg, start_reg);
} else {
__ slli(TMP, start_reg, shift);
__ add(array_reg, array_reg, TMP);
}
}
LocationSummary* PushArgumentInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
const intptr_t kNumTemps = 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
if (representation() == kUnboxedDouble) {
locs->set_in(0, Location::RequiresFpuRegister());
} else if (representation() == kUnboxedInt64) {
#if XLEN == 32
locs->set_in(0, Location::Pair(Location::RequiresRegister(),
Location::RequiresRegister()));
#else
locs->set_in(0, Location::RequiresRegister());
#endif
} else {
locs->set_in(0, LocationAnyOrConstant(value()));
}
return locs;
}
void PushArgumentInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// In SSA mode, we need an explicit push. Nothing to do in non-SSA mode
// where arguments are pushed by their definitions.
if (compiler->is_optimizing()) {
if (previous()->IsPushArgument()) {
// Already generated.
return;
}
// Count the arguments first so we can update SP once instead of using
// separate pushes.
intptr_t size = 0;
for (PushArgumentInstr* push_arg = this; push_arg != nullptr;
push_arg = push_arg->next()->AsPushArgument()) {
const Location value = push_arg->locs()->in(0);
if (value.IsRegister()) {
size += compiler::target::kWordSize;
#if XLEN == 32
} else if (value.IsPairLocation()) {
size += 2 * compiler::target::kWordSize;
#endif
} else if (value.IsConstant()) {
size += compiler::target::kWordSize;
} else if (value.IsFpuRegister()) {
size += sizeof(double);
} else if (value.IsStackSlot()) {
size += compiler::target::kWordSize;
} else {
UNREACHABLE();
}
}
__ subi(SP, SP, size);
intptr_t offset = size;
for (PushArgumentInstr* push_arg = this; push_arg != nullptr;
push_arg = push_arg->next()->AsPushArgument()) {
const Location value = push_arg->locs()->in(0);
if (value.IsRegister()) {
offset -= compiler::target::kWordSize;
__ StoreToOffset(value.reg(), SP, offset);
#if XLEN == 32
} else if (value.IsPairLocation()) {
offset -= compiler::target::kWordSize;
__ StoreToOffset(value.AsPairLocation()->At(1).reg(), SP, offset);
offset -= compiler::target::kWordSize;
__ StoreToOffset(value.AsPairLocation()->At(0).reg(), SP, offset);
#endif
} else if (value.IsConstant()) {
const Object& constant = value.constant();
Register reg;
if (constant.IsNull()) {
reg = NULL_REG;
} else if (constant.IsSmi() && Smi::Cast(constant).Value() == 0) {
reg = ZR;
} else {
reg = TMP;
__ LoadObject(TMP, constant);
}
offset -= compiler::target::kWordSize;
__ StoreToOffset(reg, SP, offset);
} else if (value.IsFpuRegister()) {
offset -= sizeof(double);
__ StoreDToOffset(value.fpu_reg(), SP, offset);
} else if (value.IsStackSlot()) {
const intptr_t value_offset = value.ToStackSlotOffset();
__ LoadFromOffset(TMP, value.base_reg(), value_offset);
offset -= compiler::target::kWordSize;
__ StoreToOffset(TMP, SP, offset);
} else {
UNREACHABLE();
}
}
ASSERT(offset == 0);
}
}
LocationSummary* ReturnInstr::MakeLocationSummary(Zone* zone, bool opt) const {
const intptr_t kNumInputs = 1;
const intptr_t kNumTemps = 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
switch (representation()) {
case kTagged:
locs->set_in(0,
Location::RegisterLocation(CallingConventions::kReturnReg));
break;
case kUnboxedInt64:
#if XLEN == 32
locs->set_in(
0, Location::Pair(
Location::RegisterLocation(CallingConventions::kReturnReg),
Location::RegisterLocation(
CallingConventions::kSecondReturnReg)));
#else
locs->set_in(0,
Location::RegisterLocation(CallingConventions::kReturnReg));
#endif
break;
case kUnboxedDouble:
locs->set_in(
0, Location::FpuRegisterLocation(CallingConventions::kReturnFpuReg));
break;
default:
UNREACHABLE();
break;
}
return locs;
}
// Attempt optimized compilation at return instruction instead of at the entry.
// The entry needs to be patchable, no inlined objects are allowed in the area
// that will be overwritten by the patch instructions: a branch macro sequence.
void ReturnInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
if (locs()->in(0).IsRegister()) {
const Register result = locs()->in(0).reg();
ASSERT(result == CallingConventions::kReturnReg);
} else if (locs()->in(0).IsPairLocation()) {
const Register result_lo = locs()->in(0).AsPairLocation()->At(0).reg();
const Register result_hi = locs()->in(0).AsPairLocation()->At(1).reg();
ASSERT(result_lo == CallingConventions::kReturnReg);
ASSERT(result_hi == CallingConventions::kSecondReturnReg);
} else {
ASSERT(locs()->in(0).IsFpuRegister());
const FpuRegister result = locs()->in(0).fpu_reg();
ASSERT(result == CallingConventions::kReturnFpuReg);
}
if (!compiler->flow_graph().graph_entry()->NeedsFrame()) {
__ ret();
return;
}
#if defined(DEBUG)
compiler::Label stack_ok;
__ Comment("Stack Check");
const intptr_t fp_sp_dist =
(compiler::target::frame_layout.first_local_from_fp + 1 -
compiler->StackSize()) *
kWordSize;
ASSERT(fp_sp_dist <= 0);
__ sub(TMP, SP, FP);
__ CompareImmediate(TMP, fp_sp_dist);
__ BranchIf(EQ, &stack_ok, compiler::Assembler::kNearJump);
__ ebreak();
__ Bind(&stack_ok);
#endif
ASSERT(__ constant_pool_allowed());
if (yield_index() != UntaggedPcDescriptors::kInvalidYieldIndex) {
compiler->EmitYieldPositionMetadata(source(), yield_index());
}
__ LeaveDartFrame(); // Disallows constant pool use.
__ ret();
// This ReturnInstr may be emitted out of order by the optimizer. The next
// block may be a target expecting a properly set constant pool pointer.
__ set_constant_pool_allowed(true);
}
// Detect pattern when one value is zero and another is a power of 2.
static bool IsPowerOfTwoKind(intptr_t v1, intptr_t v2) {
return (Utils::IsPowerOfTwo(v1) && (v2 == 0)) ||
(Utils::IsPowerOfTwo(v2) && (v1 == 0));
}
LocationSummary* IfThenElseInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
comparison()->InitializeLocationSummary(zone, opt);
return comparison()->locs();
}
void IfThenElseInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
const Register result = locs()->out(0).reg();
Location left = locs()->in(0);
Location right = locs()->in(1);
ASSERT(!left.IsConstant() || !right.IsConstant());
// Emit comparison code. This must not overwrite the result register.
// IfThenElseInstr::Supports() should prevent EmitComparisonCode from using
// the labels or returning an invalid condition.
BranchLabels labels = {NULL, NULL, NULL};
Condition true_condition = comparison()->EmitComparisonCode(compiler, labels);
ASSERT(true_condition != kInvalidCondition);
const bool is_power_of_two_kind = IsPowerOfTwoKind(if_true_, if_false_);
intptr_t true_value = if_true_;
intptr_t false_value = if_false_;
if (is_power_of_two_kind) {
if (true_value == 0) {
// We need to have zero in result on true_condition.
true_condition = InvertCondition(true_condition);
}
} else {
if (true_value == 0) {
// Swap values so that false_value is zero.
intptr_t temp = true_value;
true_value = false_value;
false_value = temp;
} else {
true_condition = InvertCondition(true_condition);
}
}
__ SetIf(true_condition, result);
if (is_power_of_two_kind) {
const intptr_t shift =
Utils::ShiftForPowerOfTwo(Utils::Maximum(true_value, false_value));
__ slli(result, result, shift + kSmiTagSize);
} else {
__ subi(result, result, 1);
const int64_t val = Smi::RawValue(true_value) - Smi::RawValue(false_value);
__ AndImmediate(result, result, val);
if (false_value != 0) {
__ AddImmediate(result, Smi::RawValue(false_value));
}
}
}
LocationSummary* ClosureCallInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
const intptr_t kNumTemps = 0;
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kCall);
summary->set_in(0, Location::RegisterLocation(T0)); // Function.
return MakeCallSummary(zone, this, summary);
}
void ClosureCallInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// Load arguments descriptor in S4.
const intptr_t argument_count = ArgumentCount(); // Includes type args.
const Array& arguments_descriptor =
Array::ZoneHandle(Z, GetArgumentsDescriptor());
__ LoadObject(ARGS_DESC_REG, arguments_descriptor);
ASSERT(locs()->in(0).reg() == T0);
if (FLAG_precompiled_mode) {
// T0: Closure with a cached entry point.
__ LoadFieldFromOffset(A1, T0,
compiler::target::Closure::entry_point_offset());
} else {
// T0: Function.
__ LoadCompressedFieldFromOffset(CODE_REG, T0,
compiler::target::Function::code_offset());
// Closure functions only have one entry point.
__ LoadFieldFromOffset(A1, T0,
compiler::target::Function::entry_point_offset());
}
// T0: Function (argument to lazy compile stub)
// S4: Arguments descriptor array.
// A1: instructions entry point.
if (!FLAG_precompiled_mode) {
// S5: Smi 0 (no IC data; the lazy-compile stub expects a GC-safe value).
__ LoadImmediate(IC_DATA_REG, 0);
}
__ jalr(A1);
compiler->EmitCallsiteMetadata(source(), deopt_id(),
UntaggedPcDescriptors::kOther, locs(), env());
__ Drop(argument_count);
}
LocationSummary* LoadLocalInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
return LocationSummary::Make(zone, 0, Location::RequiresRegister(),
LocationSummary::kNoCall);
}
void LoadLocalInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
const Register result = locs()->out(0).reg();
__ LoadFromOffset(result, FP,
compiler::target::FrameOffsetInBytesForVariable(&local()));
// TODO(riscv): Using an SP-relative address instead of an FP-relative
// address would allow for compressed instructions.
}
LocationSummary* StoreLocalInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
return LocationSummary::Make(zone, 1, Location::SameAsFirstInput(),
LocationSummary::kNoCall);
}
void StoreLocalInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
const Register value = locs()->in(0).reg();
const Register result = locs()->out(0).reg();
ASSERT(result == value); // Assert that register assignment is correct.
__ StoreToOffset(value, FP,
compiler::target::FrameOffsetInBytesForVariable(&local()));
// TODO(riscv): Using an SP-relative address instead of an FP-relative
// address would allow for compressed instructions.
}
LocationSummary* ConstantInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
return LocationSummary::Make(zone, 0, Location::RequiresRegister(),
LocationSummary::kNoCall);
}
void ConstantInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// The register allocator drops constant definitions that have no uses.
if (!locs()->out(0).IsInvalid()) {
const Register result = locs()->out(0).reg();
__ LoadObject(result, value());
}
}
void ConstantInstr::EmitMoveToLocation(FlowGraphCompiler* compiler,
const Location& destination,
Register tmp,
intptr_t pair_index) {
if (destination.IsRegister()) {
if (RepresentationUtils::IsUnboxedInteger(representation())) {
int64_t v;
const bool ok = compiler::HasIntegerValue(value_, &v);
RELEASE_ASSERT(ok);
if (value_.IsSmi() && RepresentationUtils::IsUnsigned(representation())) {
// If the value is negative, then the sign bit was preserved during
// Smi untagging, which means the resulting value may be unexpected.
ASSERT(v >= 0);
}
#if XLEN == 32
__ LoadImmediate(destination.reg(), pair_index == 0
? Utils::Low32Bits(v)
: Utils::High32Bits(v));
#else
ASSERT(pair_index == 0); // No pair representation needed on 64-bit.
__ LoadImmediate(destination.reg(), v);
#endif
} else {
ASSERT(representation() == kTagged);
__ LoadObject(destination.reg(), value_);
}
} else if (destination.IsFpuRegister()) {
const FRegister dst = destination.fpu_reg();
__ LoadDImmediate(dst, Double::Cast(value_).value());
} else if (destination.IsDoubleStackSlot()) {
__ LoadDImmediate(FTMP, Double::Cast(value_).value());
const intptr_t dest_offset = destination.ToStackSlotOffset();
__ StoreDToOffset(FTMP, destination.base_reg(), dest_offset);
} else {
ASSERT(destination.IsStackSlot());
ASSERT(tmp != kNoRegister);
const intptr_t dest_offset = destination.ToStackSlotOffset();
if (RepresentationUtils::IsUnboxedInteger(representation())) {
int64_t v;
const bool ok = compiler::HasIntegerValue(value_, &v);
RELEASE_ASSERT(ok);
#if XLEN == 32
__ LoadImmediate(
tmp, pair_index == 0 ? Utils::Low32Bits(v) : Utils::High32Bits(v));
#else
ASSERT(pair_index == 0); // No pair representation needed on 64-bit.
__ LoadImmediate(tmp, v);
#endif
} else {
ASSERT(representation() == kTagged);
if (value_.IsNull()) {
tmp = NULL_REG;
} else if (value_.IsSmi() && Smi::Cast(value_).Value() == 0) {
tmp = ZR;
} else {
__ LoadObject(tmp, value_);
}
}
__ StoreToOffset(tmp, destination.base_reg(), dest_offset);
}
}
LocationSummary* UnboxedConstantInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const bool is_unboxed_int =
RepresentationUtils::IsUnboxedInteger(representation());
ASSERT(!is_unboxed_int || RepresentationUtils::ValueSize(representation()) <=
compiler::target::kWordSize);
const intptr_t kNumInputs = 0;
const intptr_t kNumTemps = is_unboxed_int ? 0 : 1;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
if (is_unboxed_int) {
locs->set_out(0, Location::RequiresRegister());
} else {
switch (representation()) {
case kUnboxedDouble:
locs->set_out(0, Location::RequiresFpuRegister());
locs->set_temp(0, Location::RequiresRegister());
break;
default:
UNREACHABLE();
break;
}
}
return locs;
}
void UnboxedConstantInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
if (!locs()->out(0).IsInvalid()) {
const Register scratch =
RepresentationUtils::IsUnboxedInteger(representation())
? kNoRegister
: locs()->temp(0).reg();
EmitMoveToLocation(compiler, locs()->out(0), scratch);
}
}
LocationSummary* AssertAssignableInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
auto const dst_type_loc =
LocationFixedRegisterOrConstant(dst_type(), TypeTestABI::kDstTypeReg);
// We want to prevent spilling of the inputs (e.g. function/instantiator tav),
// since TTS preserves them. So we make this a `kNoCall` summary,
// even though most other registers can be modified by the stub. To tell the
// register allocator about it, we reserve all the other registers as
// temporary registers.
// TODO(http://dartbug.com/32788): Simplify this.
const intptr_t kNonChangeableInputRegs =
(1 << TypeTestABI::kInstanceReg) |
((dst_type_loc.IsRegister() ? 1 : 0) << TypeTestABI::kDstTypeReg) |
(1 << TypeTestABI::kInstantiatorTypeArgumentsReg) |
(1 << TypeTestABI::kFunctionTypeArgumentsReg);
const intptr_t kNumInputs = 4;
// We invoke a stub that can potentially clobber any CPU register
// but can only clobber FPU registers on the slow path when
// entering runtime. ARM64 ABI only guarantees that lower
// 64-bits of an V registers are preserved so we block all
// of them except for FpuTMP.
const intptr_t kCpuRegistersToPreserve =
kDartAvailableCpuRegs & ~kNonChangeableInputRegs;
const intptr_t kFpuRegistersToPreserve =
Utils::NBitMask<intptr_t>(kNumberOfFpuRegisters) & ~(1l << FpuTMP);
const intptr_t kNumTemps = (Utils::CountOneBits32(kCpuRegistersToPreserve) +
Utils::CountOneBits32(kFpuRegistersToPreserve));
LocationSummary* summary = new (zone) LocationSummary(
zone, kNumInputs, kNumTemps, LocationSummary::kCallCalleeSafe);
summary->set_in(kInstancePos,
Location::RegisterLocation(TypeTestABI::kInstanceReg));
summary->set_in(kDstTypePos, dst_type_loc);
summary->set_in(
kInstantiatorTAVPos,
Location::RegisterLocation(TypeTestABI::kInstantiatorTypeArgumentsReg));
summary->set_in(kFunctionTAVPos, Location::RegisterLocation(
TypeTestABI::kFunctionTypeArgumentsReg));
summary->set_out(0, Location::SameAsFirstInput());
// Let's reserve all registers except for the input ones.
intptr_t next_temp = 0;
for (intptr_t i = 0; i < kNumberOfCpuRegisters; ++i) {
const bool should_preserve = ((1 << i) & kCpuRegistersToPreserve) != 0;
if (should_preserve) {
summary->set_temp(next_temp++,
Location::RegisterLocation(static_cast<Register>(i)));
}
}
for (intptr_t i = 0; i < kNumberOfFpuRegisters; i++) {
const bool should_preserve = ((1l << i) & kFpuRegistersToPreserve) != 0;
if (should_preserve) {
summary->set_temp(next_temp++, Location::FpuRegisterLocation(
static_cast<FpuRegister>(i)));
}
}
return summary;
}
void AssertBooleanInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
ASSERT(locs()->always_calls());
auto object_store = compiler->isolate_group()->object_store();
const auto& assert_boolean_stub =
Code::ZoneHandle(compiler->zone(), object_store->assert_boolean_stub());
compiler::Label done;
__ andi(TMP, AssertBooleanABI::kObjectReg, 1 << kBoolVsNullBitPosition);
__ bnez(TMP, &done, compiler::Assembler::kNearJump);
compiler->GenerateStubCall(source(), assert_boolean_stub,
/*kind=*/UntaggedPcDescriptors::kOther, locs(),
deopt_id(), env());
__ Bind(&done);
}
static Condition TokenKindToIntCondition(Token::Kind kind) {
switch (kind) {
case Token::kEQ:
return EQ;
case Token::kNE:
return NE;
case Token::kLT:
return LT;
case Token::kGT:
return GT;
case Token::kLTE:
return LE;
case Token::kGTE:
return GE;
default:
UNREACHABLE();
return VS;
}
}
static Condition FlipCondition(Condition condition) {
switch (condition) {
case EQ:
return EQ;
case NE:
return NE;
case LT:
return GT;
case LE:
return GE;
case GT:
return LT;
case GE:
return LE;
case CC:
return HI;
case LS:
return CS;
case HI:
return CC;
case CS:
return LS;
default:
UNREACHABLE();
return EQ;
}
}
static void EmitBranchOnCondition(
FlowGraphCompiler* compiler,
Condition true_condition,
BranchLabels labels,
compiler::Assembler::JumpDistance jump_distance =
compiler::Assembler::kFarJump) {
if (labels.fall_through == labels.false_label) {
// If the next block is the false successor we will fall through to it.
__ BranchIf(true_condition, labels.true_label, jump_distance);
} else {
// If the next block is not the false successor we will branch to it.
Condition false_condition = InvertCondition(true_condition);
__ BranchIf(false_condition, labels.false_label, jump_distance);
// Fall through or jump to the true successor.
if (labels.fall_through != labels.true_label) {
__ j(labels.true_label, jump_distance);
}
}
}
static Condition EmitSmiComparisonOp(FlowGraphCompiler* compiler,
LocationSummary* locs,
Token::Kind kind,
BranchLabels labels) {
Location left = locs->in(0);
Location right = locs->in(1);
ASSERT(!left.IsConstant() || !right.IsConstant());
Condition true_condition = TokenKindToIntCondition(kind);
if (left.IsConstant() || right.IsConstant()) {
// Ensure constant is on the right.
if (left.IsConstant()) {
Location tmp = right;
right = left;
left = tmp;
true_condition = FlipCondition(true_condition);
}
__ CompareObject(left.reg(), right.constant());
} else {
__ CompareObjectRegisters(left.reg(), right.reg());
}
return true_condition;
}
#if XLEN == 32
static Condition EmitUnboxedMintEqualityOp(FlowGraphCompiler* compiler,
LocationSummary* locs,
Token::Kind kind) {
ASSERT(Token::IsEqualityOperator(kind));
PairLocation* left_pair = locs->in(0).AsPairLocation();
Register left_lo = left_pair->At(0).reg();
Register left_hi = left_pair->At(1).reg();
PairLocation* right_pair = locs->in(1).AsPairLocation();
Register right_lo = right_pair->At(0).reg();
Register right_hi = right_pair->At(1).reg();
__ xor_(TMP, left_lo, right_lo);
__ xor_(TMP2, left_hi, right_hi);
__ or_(TMP, TMP, TMP2);
__ CompareImmediate(TMP, 0);
if (kind == Token::kEQ) {
return EQUAL;
} else if (kind == Token::kNE) {
return NOT_EQUAL;
}
UNREACHABLE();
}
static Condition EmitUnboxedMintComparisonOp(FlowGraphCompiler* compiler,
LocationSummary* locs,
Token::Kind kind,
BranchLabels labels) {
PairLocation* left_pair = locs->in(0).AsPairLocation();
Register left_lo = left_pair->At(0).reg();
Register left_hi = left_pair->At(1).reg();
PairLocation* right_pair = locs->in(1).AsPairLocation();
Register right_lo = right_pair->At(0).reg();
Register right_hi = right_pair->At(1).reg();
switch (kind) {
case Token::kEQ:
__ bne(left_lo, right_lo, labels.false_label);
__ CompareRegisters(left_hi, right_hi);
return EQUAL;
case Token::kNE:
__ bne(left_lo, right_lo, labels.true_label);
__ CompareRegisters(left_hi, right_hi);
return NOT_EQUAL;
case Token::kLT:
__ blt(left_hi, right_hi, labels.true_label);
__ bgt(left_hi, right_hi, labels.false_label);
__ CompareRegisters(left_lo, right_lo);
return UNSIGNED_LESS;
case Token::kGT:
__ bgt(left_hi, right_hi, labels.true_label);
__ blt(left_hi, right_hi, labels.false_label);
__ CompareRegisters(left_lo, right_lo);
return UNSIGNED_GREATER;
case Token::kLTE:
__ blt(left_hi, right_hi, labels.true_label);
__ bgt(left_hi, right_hi, labels.false_label);
__ CompareRegisters(left_lo, right_lo);
return UNSIGNED_LESS_EQUAL;
case Token::kGTE:
__ bgt(left_hi, right_hi, labels.true_label);
__ blt(left_hi, right_hi, labels.false_label);
__ CompareRegisters(left_lo, right_lo);
return UNSIGNED_GREATER_EQUAL;
default:
UNREACHABLE();
}
}
#else
// Similar to ComparisonInstr::EmitComparisonCode, may either:
// - emit comparison code and return a valid condition in which case the
// caller is expected to emit a branch to the true label based on that
// condition (or a branch to the false label on the opposite condition).
// - emit comparison code with a branch directly to the labels and return
// kInvalidCondition.
static Condition EmitInt64ComparisonOp(FlowGraphCompiler* compiler,
LocationSummary* locs,
Token::Kind kind,
BranchLabels labels) {
Location left = locs->in(0);
Location right = locs->in(1);
ASSERT(!left.IsConstant() || !right.IsConstant());
Condition true_condition = TokenKindToIntCondition(kind);
if (left.IsConstant() || right.IsConstant()) {
// Ensure constant is on the right.
ConstantInstr* constant = nullptr;
if (left.IsConstant()) {
constant = left.constant_instruction();
Location tmp = right;
right = left;
left = tmp;
true_condition = FlipCondition(true_condition);
} else {
constant = right.constant_instruction();
}
if (RepresentationUtils::IsUnboxedInteger(constant->representation())) {
int64_t value;
const bool ok = compiler::HasIntegerValue(constant->value(), &value);
RELEASE_ASSERT(ok);
__ CompareImmediate(left.reg(), value);
} else {
UNREACHABLE();
}
} else {
__ CompareRegisters(left.reg(), right.reg());
}
return true_condition;
}
#endif
static Condition EmitNullAwareInt64ComparisonOp(FlowGraphCompiler* compiler,
LocationSummary* locs,
Token::Kind kind,
BranchLabels labels) {
ASSERT((kind == Token::kEQ) || (kind == Token::kNE));
const Register left = locs->in(0).reg();
const Register right = locs->in(1).reg();
const Condition true_condition = TokenKindToIntCondition(kind);
compiler::Label* equal_result =
(true_condition == EQ) ? labels.true_label : labels.false_label;
compiler::Label* not_equal_result =
(true_condition == EQ) ? labels.false_label : labels.true_label;
// Check if operands have the same value. If they don't, then they could
// be equal only if both of them are Mints with the same value.
__ CompareObjectRegisters(left, right);
__ BranchIf(EQ, equal_result);
__ and_(TMP, left, right);
__ BranchIfSmi(TMP, not_equal_result);
__ CompareClassId(left, kMintCid, TMP);
__ BranchIf(NE, not_equal_result);
__ CompareClassId(right, kMintCid, TMP);
__ BranchIf(NE, not_equal_result);
#if XLEN == 32
__ LoadFieldFromOffset(TMP, left, compiler::target::Mint::value_offset());
__ LoadFieldFromOffset(TMP2, right, compiler::target::Mint::value_offset());
__ bne(TMP, TMP2, not_equal_result);
__ LoadFieldFromOffset(
TMP, left,
compiler::target::Mint::value_offset() + compiler::target::kWordSize);
__ LoadFieldFromOffset(
TMP2, right,
compiler::target::Mint::value_offset() + compiler::target::kWordSize);
#else
__ LoadFieldFromOffset(TMP, left, Mint::value_offset());
__ LoadFieldFromOffset(TMP2, right, Mint::value_offset());
#endif
__ CompareRegisters(TMP, TMP2);
return true_condition;
}
LocationSummary* EqualityCompareInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 2;
const intptr_t kNumTemps = 0;
if (is_null_aware()) {
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::RequiresRegister());
locs->set_in(1, Location::RequiresRegister());
locs->set_out(0, Location::RequiresRegister());
return locs;
}
#if XLEN == 32
if (operation_cid() == kMintCid) {
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::Pair(Location::RequiresRegister(),
Location::RequiresRegister()));
locs->set_in(1, Location::Pair(Location::RequiresRegister(),
Location::RequiresRegister()));
locs->set_out(0, Location::RequiresRegister());
return locs;
}
#endif
if (operation_cid() == kDoubleCid) {
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::RequiresFpuRegister());
locs->set_in(1, Location::RequiresFpuRegister());
locs->set_out(0, Location::RequiresRegister());
return locs;
}
if (operation_cid() == kSmiCid || operation_cid() == kMintCid) {
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
if (is_null_aware()) {
locs->set_in(0, Location::RequiresRegister());
locs->set_in(1, Location::RequiresRegister());
} else {
locs->set_in(0, LocationRegisterOrConstant(left()));
// Only one input can be a constant operand. The case of two constant
// operands should be handled by constant propagation.
// Only right can be a stack slot.
locs->set_in(1, locs->in(0).IsConstant()
? Location::RequiresRegister()
: LocationRegisterOrConstant(right()));
}
locs->set_out(0, Location::RequiresRegister());
return locs;
}
UNREACHABLE();
return NULL;
}
static Condition EmitDoubleComparisonOp(FlowGraphCompiler* compiler,
LocationSummary* locs,
BranchLabels labels,
Token::Kind kind) {
const FRegister left = locs->in(0).fpu_reg();
const FRegister right = locs->in(1).fpu_reg();
// TODO(riscv): Check if this does want we want for comparisons involving NaN.
switch (kind) {
case Token::kEQ:
__ feqd(TMP, left, right);
__ CompareImmediate(TMP, 0);
return NE;
case Token::kNE:
__ feqd(TMP, left, right);
__ CompareImmediate(TMP, 0);
return EQ;
case Token::kLT:
__ fltd(TMP, left, right);
__ CompareImmediate(TMP, 0);
return NE;
case Token::kGT:
__ fltd(TMP, right, left);
__ CompareImmediate(TMP, 0);
return NE;
case Token::kLTE:
__ fled(TMP, left, right);
__ CompareImmediate(TMP, 0);
return NE;
case Token::kGTE:
__ fled(TMP, right, left);
__ CompareImmediate(TMP, 0);
return NE;
default:
UNREACHABLE();
}
}
Condition EqualityCompareInstr::EmitComparisonCode(FlowGraphCompiler* compiler,
BranchLabels labels) {
if (is_null_aware()) {
ASSERT(operation_cid() == kMintCid);
return EmitNullAwareInt64ComparisonOp(compiler, locs(), kind(), labels);
}
if (operation_cid() == kSmiCid) {
return EmitSmiComparisonOp(compiler, locs(), kind(), labels);
} else if (operation_cid() == kMintCid) {
#if XLEN == 32
return EmitUnboxedMintEqualityOp(compiler, locs(), kind());
#else
return EmitInt64ComparisonOp(compiler, locs(), kind(), labels);
#endif
} else {
ASSERT(operation_cid() == kDoubleCid);
return EmitDoubleComparisonOp(compiler, locs(), labels, kind());
}
}
LocationSummary* TestSmiInstr::MakeLocationSummary(Zone* zone, bool opt) const {
const intptr_t kNumInputs = 2;
const intptr_t kNumTemps = 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::RequiresRegister());
// Only one input can be a constant operand. The case of two constant
// operands should be handled by constant propagation.
locs->set_in(1, LocationRegisterOrConstant(right()));
return locs;
}
Condition TestSmiInstr::EmitComparisonCode(FlowGraphCompiler* compiler,
BranchLabels labels) {
const Register left = locs()->in(0).reg();
Location right = locs()->in(1);
if (right.IsConstant()) {
ASSERT(right.constant().IsSmi());
const intx_t imm = static_cast<intx_t>(right.constant().ptr());
__ TestImmediate(left, imm);
} else {
__ TestRegisters(left, right.reg());
}
Condition true_condition = (kind() == Token::kNE) ? NE : EQ;
return true_condition;
}
LocationSummary* TestCidsInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
const intptr_t kNumTemps = 1;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::RequiresRegister());
locs->set_temp(0, Location::RequiresRegister());
locs->set_out(0, Location::RequiresRegister());
return locs;
}
Condition TestCidsInstr::EmitComparisonCode(FlowGraphCompiler* compiler,
BranchLabels labels) {
ASSERT((kind() == Token::kIS) || (kind() == Token::kISNOT));
const Register val_reg = locs()->in(0).reg();
const Register cid_reg = locs()->temp(0).reg();
compiler::Label* deopt =
CanDeoptimize()
? compiler->AddDeoptStub(deopt_id(), ICData::kDeoptTestCids,
licm_hoisted_ ? ICData::kHoisted : 0)
: NULL;
const intptr_t true_result = (kind() == Token::kIS) ? 1 : 0;
const ZoneGrowableArray<intptr_t>& data = cid_results();
ASSERT(data[0] == kSmiCid);
bool result = data[1] == true_result;
__ BranchIfSmi(val_reg, result ? labels.true_label : labels.false_label);
__ LoadClassId(cid_reg, val_reg);
for (intptr_t i = 2; i < data.length(); i += 2) {
const intptr_t test_cid = data[i];
ASSERT(test_cid != kSmiCid);
result = data[i + 1] == true_result;
__ CompareImmediate(cid_reg, test_cid);
__ BranchIf(EQ, result ? labels.true_label : labels.false_label);
}
// No match found, deoptimize or default action.
if (deopt == NULL) {
// If the cid is not in the list, jump to the opposite label from the cids
// that are in the list. These must be all the same (see asserts in the
// constructor).
compiler::Label* target = result ? labels.false_label : labels.true_label;
if (target != labels.fall_through) {
__ j(target);
}
} else {
__ j(deopt);
}
// Dummy result as this method already did the jump, there's no need
// for the caller to branch on a condition.
return kInvalidCondition;
}
LocationSummary* RelationalOpInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 2;
const intptr_t kNumTemps = 0;
#if XLEN == 32
if (operation_cid() == kMintCid) {
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::Pair(Location::RequiresRegister(),
Location::RequiresRegister()));
locs->set_in(1, Location::Pair(Location::RequiresRegister(),
Location::RequiresRegister()));
locs->set_out(0, Location::RequiresRegister());
return locs;
}
#endif
if (operation_cid() == kDoubleCid) {
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
summary->set_in(0, Location::RequiresFpuRegister());
summary->set_in(1, Location::RequiresFpuRegister());
summary->set_out(0, Location::RequiresRegister());
return summary;
}
if (operation_cid() == kSmiCid || operation_cid() == kMintCid) {
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
summary->set_in(0, LocationRegisterOrConstant(left()));
// Only one input can be a constant operand. The case of two constant
// operands should be handled by constant propagation.
summary->set_in(1, summary->in(0).IsConstant()
? Location::RequiresRegister()
: LocationRegisterOrConstant(right()));
summary->set_out(0, Location::RequiresRegister());
return summary;
}
UNREACHABLE();
return NULL;
}
Condition RelationalOpInstr::EmitComparisonCode(FlowGraphCompiler* compiler,
BranchLabels labels) {
if (operation_cid() == kSmiCid) {
return EmitSmiComparisonOp(compiler, locs(), kind(), labels);
} else if (operation_cid() == kMintCid) {
#if XLEN == 32
return EmitUnboxedMintComparisonOp(compiler, locs(), kind(), labels);
#else
return EmitInt64ComparisonOp(compiler, locs(), kind(), labels);
#endif
} else {
ASSERT(operation_cid() == kDoubleCid);
return EmitDoubleComparisonOp(compiler, locs(), labels, kind());
}
}
void NativeCallInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
SetupNative();
const Register result = locs()->out(0).reg();
// All arguments are already @SP due to preceding PushArgument()s.
ASSERT(ArgumentCount() ==
function().NumParameters() + (function().IsGeneric() ? 1 : 0));
// Push the result place holder initialized to NULL.
__ PushObject(Object::null_object());
// Pass a pointer to the first argument in R2.
__ AddImmediate(T2, SP, ArgumentCount() * kWordSize);
// Compute the effective address. When running under the simulator,
// this is a redirection address that forces the simulator to call
// into the runtime system.
uword entry;
const intptr_t argc_tag = NativeArguments::ComputeArgcTag(function());
const Code* stub;
if (link_lazily()) {
stub = &StubCode::CallBootstrapNative();
entry = NativeEntry::LinkNativeCallEntry();
} else {
entry = reinterpret_cast<uword>(native_c_function());
if (is_bootstrap_native()) {
stub = &StubCode::CallBootstrapNative();
} else if (is_auto_scope()) {
stub = &StubCode::CallAutoScopeNative();
} else {
stub = &StubCode::CallNoScopeNative();
}
}
__ LoadImmediate(T1, argc_tag);
compiler::ExternalLabel label(entry);
__ LoadNativeEntry(T5, &label,
link_lazily() ? ObjectPool::Patchability::kPatchable
: ObjectPool::Patchability::kNotPatchable);
if (link_lazily()) {
compiler->GeneratePatchableCall(source(), *stub,
UntaggedPcDescriptors::kOther, locs());
} else {
// We can never lazy-deopt here because natives are never optimized.
ASSERT(!compiler->is_optimizing());
compiler->GenerateNonLazyDeoptableStubCall(
source(), *stub, UntaggedPcDescriptors::kOther, locs());
}
__ lx(result, compiler::Address(SP, 0));
__ Drop(ArgumentCount() + 1); // Drop the arguments and result.
}
#define R(r) (1 << r)
LocationSummary* FfiCallInstr::MakeLocationSummary(Zone* zone,
bool is_optimizing) const {
LocationSummary* summary = MakeLocationSummaryInternal(
zone, is_optimizing,
(R(CallingConventions::kSecondNonArgumentRegister) |
R(CallingConventions::kFfiAnyNonAbiRegister) | R(CALLEE_SAVED_TEMP2)));
// A3/A4/A5 are unavailable in normal register allocation because they are
// assigned to TMP/TMP2/PP. This assignment is important for reducing code
// size. We can't just override the normal blockage of these registers because
// they may be used by other instructions between the argument's definition
// and its use in FfiCallInstr.
// Note that A3/A4/A5 might be not be the 3rd/4th/5th input because of mixed
// integer and floating-point arguments.
for (intptr_t i = 0; i < summary->input_count(); i++) {
if (!summary->in(i).IsRegister()) continue;
if (summary->in(i).reg() == A3) {
summary->set_in(i, Location::RegisterLocation(T3));
} else if (summary->in(i).reg() == A4) {
summary->set_in(i, Location::RegisterLocation(T4));
} else if (summary->in(i).reg() == A5) {
summary->set_in(i, Location::RegisterLocation(T5));
}
}
return summary;
}
#undef R
void FfiCallInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// Beware! Do not use CODE_REG/TMP/TMP2/PP within FfiCallInstr as they are
// assigned to A2/A3/A4/A5, which may be in use as argument registers.
__ set_constant_pool_allowed(false);
for (intptr_t i = 0; i < locs()->input_count(); i++) {
if (!locs()->in(i).IsRegister()) continue;
if (locs()->in(i).reg() == T3) {
__ mv(A3, T3);
} else if (locs()->in(i).reg() == T4) {
__ mv(A4, T4);
} else if (locs()->in(i).reg() == T5) {
__ mv(A5, T5);
}
}
const Register target = locs()->in(TargetAddressIndex()).reg();
// The temps are indexed according to their register number.
const Register temp1 = locs()->temp(0).reg();
// For regular calls, this holds the FP for rebasing the original locations
// during EmitParamMoves.
// For leaf calls, this holds the SP used to restore the pre-aligned SP after
// the call.
const Register saved_fp_or_sp = locs()->temp(1).reg();
const Register temp2 = locs()->temp(2).reg();
ASSERT(temp1 != target);
ASSERT(temp2 != target);
ASSERT(temp1 != saved_fp_or_sp);
ASSERT(temp2 != saved_fp_or_sp);
ASSERT(saved_fp_or_sp != target);
// Ensure these are callee-saved register and are preserved across the call.
ASSERT(IsCalleeSavedRegister(saved_fp_or_sp));
// Other temps don't need to be preserved.
__ mv(saved_fp_or_sp, is_leaf_ ? SPREG : FPREG);
if (!is_leaf_) {
// We need to create a dummy "exit frame".
// This is EnterDartFrame without accessing A2=CODE_REG or A5=PP.
if (FLAG_precompiled_mode) {
__ subi(SP, SP, 2 * compiler::target::kWordSize);
__ sx(RA, compiler::Address(SP, 1 * compiler::target::kWordSize));
__ sx(FP, compiler::Address(SP, 0 * compiler::target::kWordSize));
__ addi(FP, SP, 2 * compiler::target::kWordSize);
} else {
__ subi(SP, SP, 4 * compiler::target::kWordSize);
__ sx(RA, compiler::Address(SP, 3 * compiler::target::kWordSize));
__ sx(FP, compiler::Address(SP, 2 * compiler::target::kWordSize));
__ sx(NULL_REG, compiler::Address(SP, 1 * compiler::target::kWordSize));
__ sx(NULL_REG, compiler::Address(SP, 0 * compiler::target::kWordSize));
__ addi(FP, SP, 4 * compiler::target::kWordSize);
}
}
// Reserve space for the arguments that go on the stack (if any), then align.
__ ReserveAlignedFrameSpace(marshaller_.RequiredStackSpaceInBytes());
EmitParamMoves(compiler, is_leaf_ ? FPREG : saved_fp_or_sp, temp1, temp2);
if (compiler::Assembler::EmittingComments()) {
__ Comment(is_leaf_ ? "Leaf Call" : "Call");
}
if (is_leaf_) {
#if !defined(PRODUCT)
// Set the thread object's top_exit_frame_info and VMTag to enable the
// profiler to determine that thread is no longer executing Dart code.
__ StoreToOffset(FPREG, THR,
compiler::target::Thread::top_exit_frame_info_offset());
__ StoreToOffset(target, THR, compiler::target::Thread::vm_tag_offset());
#endif
__ jalr(target);
#if !defined(PRODUCT)
__ LoadImmediate(temp1, compiler::target::Thread::vm_tag_dart_id());
__ StoreToOffset(temp1, THR, compiler::target::Thread::vm_tag_offset());
__ StoreToOffset(ZR, THR,
compiler::target::Thread::top_exit_frame_info_offset());
#endif
} else {
// We need to copy a dummy return address up into the dummy stack frame so
// the stack walker will know which safepoint to use.
//
// AUIPC loads relative to itself.
compiler->EmitCallsiteMetadata(source(), deopt_id(),
UntaggedPcDescriptors::Kind::kOther, locs(),
env());
__ auipc(temp1, 0);
__ StoreToOffset(temp1, FPREG, kSavedCallerPcSlotFromFp * kWordSize);
if (CanExecuteGeneratedCodeInSafepoint()) {
// Update information in the thread object and enter a safepoint.
__ LoadImmediate(temp1, compiler::target::Thread::exit_through_ffi());
__ TransitionGeneratedToNative(target, FPREG, temp1,
/*enter_safepoint=*/true);
__ jalr(target);
// Update information in the thread object and leave the safepoint.
__ TransitionNativeToGenerated(temp1, /*leave_safepoint=*/true);
} else {
// We cannot trust that this code will be executable within a safepoint.
// Therefore we delegate the responsibility of entering/exiting the
// safepoint to a stub which in the VM isolate's heap, which will never
// lose execute permission.
__ lx(temp1,
compiler::Address(
THR, compiler::target::Thread::
call_native_through_safepoint_entry_point_offset()));
// Calls T0 and clobbers R19 (along with volatile registers).
ASSERT(target == T0);
__ jalr(temp1);
}
// Refresh pinned registers values (inc. write barrier mask and null
// object).
__ RestorePinnedRegisters();
}
EmitReturnMoves(compiler, temp1, temp2);
if (is_leaf_) {
// Restore the pre-aligned SP.
__ mv(SPREG, saved_fp_or_sp);
} else {
__ LeaveDartFrame();
// Restore the global object pool after returning from runtime (old space is
// moving, so the GOP could have been relocated).
if (FLAG_precompiled_mode) {
__ SetupGlobalPoolAndDispatchTable();
}
}
// PP is a volatile register, so it must be restored even for leaf FFI calls.
__ RestorePoolPointer();
__ set_constant_pool_allowed(true);
}
// Keep in sync with NativeEntryInstr::EmitNativeCode.
void NativeReturnInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
EmitReturnMoves(compiler);
__ LeaveDartFrame();
// The dummy return address is in RA, no need to pop it as on Intel.
// These can be anything besides the return registers (A0, A1) and THR (S1).
const Register vm_tag_reg = T2;
const Register old_exit_frame_reg = T3;
const Register old_exit_through_ffi_reg = T4;
const Register tmp = T5;
__ PopRegisterPair(old_exit_frame_reg, old_exit_through_ffi_reg);
// Restore top_resource.
__ PopRegisterPair(tmp, vm_tag_reg);
__ StoreToOffset(tmp, THR, compiler::target::Thread::top_resource_offset());
// Reset the exit frame info to old_exit_frame_reg *before* entering the
// safepoint.
//
// If we were called by a trampoline, it will enter the safepoint on our
// behalf.
__ TransitionGeneratedToNative(
vm_tag_reg, old_exit_frame_reg, old_exit_through_ffi_reg,
/*enter_safepoint=*/!NativeCallbackTrampolines::Enabled());
__ PopNativeCalleeSavedRegisters();
// Leave the entry frame.
__ LeaveFrame();
// Leave the dummy frame holding the pushed arguments.
__ LeaveFrame();
__ Ret();
// For following blocks.
__ set_constant_pool_allowed(true);
}
// Keep in sync with NativeReturnInstr::EmitNativeCode and ComputeInnerLRState.
void NativeEntryInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// Constant pool cannot be used until we enter the actual Dart frame.
__ set_constant_pool_allowed(false);
__ Bind(compiler->GetJumpLabel(this));
// Create a dummy frame holding the pushed arguments. This simplifies
// NativeReturnInstr::EmitNativeCode.
__ EnterFrame(0);
// Save the argument registers, in reverse order.
SaveArguments(compiler);
// Enter the entry frame. NativeParameterInstr expects this frame has size
// -exit_link_slot_from_entry_fp, verified below.
__ EnterFrame(0);
// Save a space for the code object.
__ PushImmediate(0);
__ PushNativeCalleeSavedRegisters();
// Load the thread object. If we were called by a trampoline, the thread is
// already loaded.
if (FLAG_precompiled_mode) {
compiler->LoadBSSEntry(BSS::Relocation::DRT_GetThreadForNativeCallback, A1,
A0);
} else if (!NativeCallbackTrampolines::Enabled()) {
// In JIT mode, we can just paste the address of the runtime entry into the
// generated code directly. This is not a problem since we don't save
// callbacks into JIT snapshots.
__ LoadImmediate(
A1, reinterpret_cast<int64_t>(DLRT_GetThreadForNativeCallback));
}
if (!NativeCallbackTrampolines::Enabled()) {
// Create another frame to align the frame before continuing in "native"
// code.
__ EnterFrame(0);
__ ReserveAlignedFrameSpace(0);
__ LoadImmediate(A0, callback_id_);
__ jalr(A1);
__ mv(THR, A0);
__ LeaveFrame();
}
#if defined(USING_SHADOW_CALL_STACK)
#error Unimplemented
#endif
// Refresh pinned registers values (inc. write barrier mask and null object).
__ RestorePinnedRegisters();
// Save the current VMTag on the stack.
__ LoadFromOffset(TMP, THR, compiler::target::Thread::vm_tag_offset());
// Save the top resource.
__ LoadFromOffset(A0, THR, compiler::target::Thread::top_resource_offset());
__ PushRegisterPair(A0, TMP);
__ StoreToOffset(ZR, THR, compiler::target::Thread::top_resource_offset());
__ LoadFromOffset(A0, THR,
compiler::target::Thread::exit_through_ffi_offset());
__ PushRegister(A0);
// Save the top exit frame info. We don't set it to 0 yet:
// TransitionNativeToGenerated will handle that.
__ LoadFromOffset(A0, THR,
compiler::target::Thread::top_exit_frame_info_offset());
__ PushRegister(A0);
// In debug mode, verify that we've pushed the top exit frame info at the
// correct offset from FP.
__ EmitEntryFrameVerification();
// Either DLRT_GetThreadForNativeCallback or the callback trampoline (caller)
// will leave the safepoint for us.
__ TransitionNativeToGenerated(A0, /*exit_safepoint=*/false);
// Now that the safepoint has ended, we can touch Dart objects without
// handles.
// Load the code object.
__ LoadFromOffset(A0, THR, compiler::target::Thread::callback_code_offset());
__ LoadCompressedFieldFromOffset(
A0, A0, compiler::target::GrowableObjectArray::data_offset());
__ LoadCompressedFieldFromOffset(
CODE_REG, A0,
compiler::target::Array::data_offset() +
callback_id_ * compiler::target::kCompressedWordSize);
// Put the code object in the reserved slot.
__ StoreToOffset(CODE_REG, FPREG,
kPcMarkerSlotFromFp * compiler::target::kWordSize);
if (FLAG_precompiled_mode) {
__ SetupGlobalPoolAndDispatchTable();
} else {
// We now load the pool pointer (PP) with a GC safe value as we are about to
// invoke dart code. We don't need a real object pool here.
// Smi zero does not work because ARM64 assumes PP to be untagged.
__ LoadObject(PP, compiler::NullObject());
}
// Load a GC-safe value for the arguments descriptor (unused but tagged).
__ mv(ARGS_DESC_REG, ZR);
// Load a dummy return address which suggests that we are inside of
// InvokeDartCodeStub. This is how the stack walker detects an entry frame.
__ LoadFromOffset(RA, THR,
compiler::target::Thread::invoke_dart_code_stub_offset());
__ LoadFieldFromOffset(RA, RA, compiler::target::Code::entry_point_offset());
FunctionEntryInstr::EmitNativeCode(compiler);
}
LocationSummary* OneByteStringFromCharCodeInstr::MakeLocationSummary(
Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
// TODO(fschneider): Allow immediate operands for the char code.
return LocationSummary::Make(zone, kNumInputs, Location::RequiresRegister(),
LocationSummary::kNoCall);
}
void OneByteStringFromCharCodeInstr::EmitNativeCode(
FlowGraphCompiler* compiler) {
ASSERT(compiler->is_optimizing());
const Register char_code = locs()->in(0).reg();
const Register result = locs()->out(0).reg();
__ lx(result,
compiler::Address(THR, Thread::predefined_symbols_address_offset()));
__ slli(TMP, char_code, kWordSizeLog2 - kSmiTagSize);
__ add(result, result, TMP);
__ lx(result, compiler::Address(
result, Symbols::kNullCharCodeSymbolOffset * kWordSize));
}
LocationSummary* StringToCharCodeInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
return LocationSummary::Make(zone, kNumInputs, Location::RequiresRegister(),
LocationSummary::kNoCall);
}
void StringToCharCodeInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
ASSERT(cid_ == kOneByteStringCid);
Register str = locs()->in(0).reg();
Register result = locs()->out(0).reg();
compiler::Label is_one, done;
__ LoadCompressedSmi(result,
compiler::FieldAddress(str, String::length_offset()));
__ CompareImmediate(result, Smi::RawValue(1));
__ BranchIf(EQUAL, &is_one, compiler::Assembler::kNearJump);
__ li(result, Smi::RawValue(-1));
__ j(&done, compiler::Assembler::kNearJump);
__ Bind(&is_one);
__ lbu(result, compiler::FieldAddress(str, OneByteString::data_offset()));
__ SmiTag(result);
__ Bind(&done);
}
LocationSummary* Utf8ScanInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 5;
const intptr_t kNumTemps = 0;
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
summary->set_in(0, Location::Any()); // decoder
summary->set_in(1, Location::WritableRegister()); // bytes
summary->set_in(2, Location::WritableRegister()); // start
summary->set_in(3, Location::WritableRegister()); // end
summary->set_in(4, Location::WritableRegister()); // table
summary->set_out(0, Location::RequiresRegister());
return summary;
}
void Utf8ScanInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
const Register bytes_reg = locs()->in(1).reg();
const Register start_reg = locs()->in(2).reg();
const Register end_reg = locs()->in(3).reg();
const Register table_reg = locs()->in(4).reg();
const Register size_reg = locs()->out(0).reg();
const Register bytes_ptr_reg = start_reg;
const Register bytes_end_reg = end_reg;
const Register flags_reg = bytes_reg;
const Register temp_reg = TMP;
const Register decoder_temp_reg = start_reg;
const Register flags_temp_reg = end_reg;
static const intptr_t kSizeMask = 0x03;
static const intptr_t kFlagsMask = 0x3C;
compiler::Label loop, loop_in;
// Address of input bytes.
__ LoadFieldFromOffset(bytes_reg, bytes_reg,
compiler::target::PointerBase::data_offset());
// Table.
__ AddImmediate(
table_reg, table_reg,
compiler::target::OneByteString::data_offset() - kHeapObjectTag);
// Pointers to start and end.
__ add(bytes_ptr_reg, bytes_reg, start_reg);
__ add(bytes_end_reg, bytes_reg, end_reg);
// Initialize size and flags.
__ li(size_reg, 0);
__ li(flags_reg, 0);
__ j(&loop_in, compiler::Assembler::kNearJump);
__ Bind(&loop);
// Read byte and increment pointer.
__ lbu(temp_reg, compiler::Address(bytes_ptr_reg, 0));
__ addi(bytes_ptr_reg, bytes_ptr_reg, 1);
// Update size and flags based on byte value.
__ add(temp_reg, table_reg, temp_reg);
__ lbu(temp_reg, compiler::Address(temp_reg));
__ or_(flags_reg, flags_reg, temp_reg);
__ andi(temp_reg, temp_reg, kSizeMask);
__ add(size_reg, size_reg, temp_reg);
// Stop if end is reached.
__ Bind(&loop_in);
__ bltu(bytes_ptr_reg, bytes_end_reg, &loop, compiler::Assembler::kNearJump);
// Write flags to field.
__ AndImmediate(flags_reg, flags_reg, kFlagsMask);
if (!IsScanFlagsUnboxed()) {
__ SmiTag(flags_reg);
}
Register decoder_reg;
const Location decoder_location = locs()->in(0);
if (decoder_location.IsStackSlot()) {
__ lx(decoder_temp_reg, LocationToStackSlotAddress(decoder_location));
decoder_reg = decoder_temp_reg;
} else {
decoder_reg = decoder_location.reg();
}
const auto scan_flags_field_offset = scan_flags_field_.offset_in_bytes();
if (scan_flags_field_.is_compressed() && !IsScanFlagsUnboxed()) {
UNIMPLEMENTED();
} else {
__ LoadFieldFromOffset(flags_temp_reg, decoder_reg,
scan_flags_field_offset);
__ or_(flags_temp_reg, flags_temp_reg, flags_reg);
__ StoreFieldToOffset(flags_temp_reg, decoder_reg, scan_flags_field_offset);
}
}
LocationSummary* LoadUntaggedInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
return LocationSummary::Make(zone, kNumInputs, Location::RequiresRegister(),
LocationSummary::kNoCall);
}
void LoadUntaggedInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
const Register obj = locs()->in(0).reg();
const Register result = locs()->out(0).reg();
if (object()->definition()->representation() == kUntagged) {
__ LoadFromOffset(result, obj, offset());
} else {
ASSERT(object()->definition()->representation() == kTagged);
__ LoadFieldFromOffset(result, obj, offset());
}
}
static bool CanBeImmediateIndex(Value* value, intptr_t cid, bool is_external) {
ConstantInstr* constant = value->definition()->AsConstant();
if ((constant == NULL) || !constant->value().IsSmi()) {
return false;
}
const int64_t index = Smi::Cast(constant->value()).AsInt64Value();
const intptr_t scale = Instance::ElementSizeFor(cid);
const int64_t offset =
index * scale +
(is_external ? 0 : (Instance::DataOffsetFor(cid) - kHeapObjectTag));
if (IsITypeImm(offset)) {
ASSERT(IsSTypeImm(offset));
return true;
}
return false;
}
LocationSummary* LoadIndexedInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 2;
const intptr_t kNumTemps = 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::RequiresRegister());
if (CanBeImmediateIndex(index(), class_id(), IsExternal())) {
locs->set_in(1, Location::Constant(index()->definition()->AsConstant()));
} else {
locs->set_in(1, Location::RequiresRegister());
}
if ((representation() == kUnboxedDouble) ||
(representation() == kUnboxedFloat32x4) ||
(representation() == kUnboxedInt32x4) ||
(representation() == kUnboxedFloat64x2)) {
locs->set_out(0, Location::RequiresFpuRegister());
#if XLEN == 32
} else if (representation() == kUnboxedInt64) {
ASSERT(class_id() == kTypedDataInt64ArrayCid ||
class_id() == kTypedDataUint64ArrayCid);
locs->set_out(0, Location::Pair(Location::RequiresRegister(),
Location::RequiresRegister()));
#endif
} else {
locs->set_out(0, Location::RequiresRegister());
}
return locs;
}
void LoadIndexedInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// The array register points to the backing store for external arrays.
const Register array = locs()->in(0).reg();
const Location index = locs()->in(1);
compiler::Address element_address(TMP); // Bad address.
element_address = index.IsRegister()
? __ ElementAddressForRegIndex(
IsExternal(), class_id(), index_scale(),
index_unboxed_, array, index.reg(), TMP)
: __ ElementAddressForIntIndex(
IsExternal(), class_id(), index_scale(), array,
Smi::Cast(index.constant()).Value());
if ((representation() == kUnboxedDouble) ||
(representation() == kUnboxedFloat32x4) ||
(representation() == kUnboxedInt32x4) ||
(representation() == kUnboxedFloat64x2)) {
const FRegister result = locs()->out(0).fpu_reg();
switch (class_id()) {
case kTypedDataFloat32ArrayCid:
// Load single precision float.
__ flw(result, element_address);
break;
case kTypedDataFloat64ArrayCid:
// Load double precision float.
__ fld(result, element_address);
break;
case kTypedDataFloat64x2ArrayCid:
case kTypedDataInt32x4ArrayCid:
case kTypedDataFloat32x4ArrayCid:
UNIMPLEMENTED();
break;
default:
UNREACHABLE();
}
return;
}
switch (class_id()) {
case kTypedDataInt32ArrayCid: {
ASSERT(representation() == kUnboxedInt32);
const Register result = locs()->out(0).reg();
__ lw(result, element_address);
break;
}
case kTypedDataUint32ArrayCid: {
ASSERT(representation() == kUnboxedUint32);
const Register result = locs()->out(0).reg();
#if XLEN == 32
__ lw(result, element_address);
#else
__ lwu(result, element_address);
#endif
break;
}
case kTypedDataInt64ArrayCid:
case kTypedDataUint64ArrayCid: {
ASSERT(representation() == kUnboxedInt64);
#if XLEN == 32
ASSERT(locs()->out(0).IsPairLocation());
PairLocation* result_pair = locs()->out(0).AsPairLocation();
const Register result_lo = result_pair->At(0).reg();
const Register result_hi = result_pair->At(1).reg();
__ lw(result_lo, element_address);
__ lw(result_hi, compiler::Address(element_address.base(),
element_address.offset() + 4));
#else
const Register result = locs()->out(0).reg();
__ ld(result, element_address);
#endif
break;
}
case kTypedDataInt8ArrayCid: {
ASSERT(representation() == kUnboxedIntPtr);
ASSERT(index_scale() == 1);
const Register result = locs()->out(0).reg();
__ lb(result, element_address);
break;
}
case kTypedDataUint8ArrayCid:
case kTypedDataUint8ClampedArrayCid:
case kExternalTypedDataUint8ArrayCid:
case kExternalTypedDataUint8ClampedArrayCid:
case kOneByteStringCid:
case kExternalOneByteStringCid: {
ASSERT(representation() == kUnboxedIntPtr);
ASSERT(index_scale() == 1);
const Register result = locs()->out(0).reg();
__ lbu(result, element_address);
break;
}
case kTypedDataInt16ArrayCid: {
ASSERT(representation() == kUnboxedIntPtr);
const Register result = locs()->out(0).reg();
__ lh(result, element_address);
break;
}
case kTypedDataUint16ArrayCid:
case kTwoByteStringCid:
case kExternalTwoByteStringCid: {
ASSERT(representation() == kUnboxedIntPtr);
const Register result = locs()->out(0).reg();
__ lhu(result, element_address);
break;
}
default: {
ASSERT(representation() == kTagged);
ASSERT((class_id() == kArrayCid) || (class_id() == kImmutableArrayCid) ||
(class_id() == kTypeArgumentsCid));
const Register result = locs()->out(0).reg();
__ lx(result, element_address);
break;
}
}
}
LocationSummary* LoadCodeUnitsInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 2;
const intptr_t kNumTemps = 0;
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
summary->set_in(0, Location::RequiresRegister());
summary->set_in(1, Location::RequiresRegister());
#if XLEN == 32
if (representation() == kUnboxedInt64) {
summary->set_out(0, Location::Pair(Location::RequiresRegister(),
Location::RequiresRegister()));
} else {
ASSERT(representation() == kTagged);
summary->set_out(0, Location::RequiresRegister());
}
#else
summary->set_out(0, Location::RequiresRegister());
#endif
return summary;
}
void LoadCodeUnitsInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// The string register points to the backing store for external strings.
const Register str = locs()->in(0).reg();
const Location index = locs()->in(1);
compiler::OperandSize sz = compiler::kByte;
#if XLEN == 32
if (representation() == kUnboxedInt64) {
ASSERT(compiler->is_optimizing());
ASSERT(locs()->out(0).IsPairLocation());
UNIMPLEMENTED();
}
#endif
Register result = locs()->out(0).reg();
switch (class_id()) {
case kOneByteStringCid:
case kExternalOneByteStringCid:
switch (element_count()) {
case 1:
sz = compiler::kUnsignedByte;
break;
case 2:
sz = compiler::kUnsignedTwoBytes;
break;
case 4:
sz = compiler::kUnsignedFourBytes;
break;
default:
UNREACHABLE();
}
break;
case kTwoByteStringCid:
case kExternalTwoByteStringCid:
switch (element_count()) {
case 1:
sz = compiler::kUnsignedTwoBytes;
break;
case 2:
sz = compiler::kUnsignedFourBytes;
break;
default:
UNREACHABLE();
}
break;
default:
UNREACHABLE();
break;
}
// Warning: element_address may use register TMP as base.
compiler::Address element_address = __ ElementAddressForRegIndexWithSize(
IsExternal(), class_id(), sz, index_scale(), /*index_unboxed=*/false, str,
index.reg(), TMP);
switch (sz) {
case compiler::kUnsignedByte:
__ lbu(result, element_address);
break;
case compiler::kUnsignedTwoBytes:
__ lhu(result, element_address);
break;
case compiler::kUnsignedFourBytes:
#if XLEN == 32
__ lw(result, element_address);
#else
__ lwu(result, element_address);
#endif
break;
default:
UNREACHABLE();
}
ASSERT(can_pack_into_smi());
__ SmiTag(result);
}
LocationSummary* StoreIndexedInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 3;
const intptr_t kNumTemps = 1;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::RequiresRegister());
if (CanBeImmediateIndex(index(), class_id(), IsExternal())) {
locs->set_in(1, Location::Constant(index()->definition()->AsConstant()));
} else {
locs->set_in(1, Location::RequiresRegister());
}
locs->set_temp(0, Location::RequiresRegister());
switch (class_id()) {
case kArrayCid:
locs->set_in(2, ShouldEmitStoreBarrier()
? Location::RegisterLocation(kWriteBarrierValueReg)
: LocationRegisterOrConstant(value()));
if (ShouldEmitStoreBarrier()) {
locs->set_in(0, Location::RegisterLocation(kWriteBarrierObjectReg));
locs->set_temp(0, Location::RegisterLocation(kWriteBarrierSlotReg));
}
break;
case kExternalTypedDataUint8ArrayCid:
case kExternalTypedDataUint8ClampedArrayCid:
case kTypedDataInt8ArrayCid:
case kTypedDataUint8ArrayCid:
case kTypedDataUint8ClampedArrayCid:
case kOneByteStringCid:
case kTwoByteStringCid:
case kTypedDataInt16ArrayCid:
case kTypedDataUint16ArrayCid:
case kTypedDataInt32ArrayCid:
case kTypedDataUint32ArrayCid:
locs->set_in(2, Location::RequiresRegister());
break;
case kTypedDataInt64ArrayCid:
case kTypedDataUint64ArrayCid:
#if XLEN == 32
locs->set_in(2, Location::Pair(Location::RequiresRegister(),
Location::RequiresRegister()));
#else
locs->set_in(2, Location::RequiresRegister());
#endif
break;
case kTypedDataFloat32ArrayCid:
case kTypedDataFloat64ArrayCid: // TODO(srdjan): Support Float64 constants.
locs->set_in(2, Location::RequiresFpuRegister());
break;
case kTypedDataInt32x4ArrayCid:
case kTypedDataFloat32x4ArrayCid:
case kTypedDataFloat64x2ArrayCid:
locs->set_in(2, Location::RequiresFpuRegister());
break;
default:
UNREACHABLE();
return NULL;
}
return locs;
}
void StoreIndexedInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// The array register points to the backing store for external arrays.
const Register array = locs()->in(0).reg();
const Location index = locs()->in(1);
const Register temp = locs()->temp(0).reg();
compiler::Address element_address(TMP); // Bad address.
// Deal with a special case separately.
if (class_id() == kArrayCid && ShouldEmitStoreBarrier()) {
if (index.IsRegister()) {
__ ComputeElementAddressForRegIndex(temp, IsExternal(), class_id(),
index_scale(), index_unboxed_, array,
index.reg());
} else {
__ ComputeElementAddressForIntIndex(temp, IsExternal(), class_id(),
index_scale(), array,
Smi::Cast(index.constant()).Value());
}
const Register value = locs()->in(2).reg();
__ StoreIntoArray(array, temp, value, CanValueBeSmi());
return;
}
element_address = index.IsRegister()
? __ ElementAddressForRegIndex(
IsExternal(), class_id(), index_scale(),
index_unboxed_, array, index.reg(), temp)
: __ ElementAddressForIntIndex(
IsExternal(), class_id(), index_scale(), array,
Smi::Cast(index.constant()).Value());
switch (class_id()) {
case kArrayCid:
ASSERT(!ShouldEmitStoreBarrier()); // Specially treated above.
if (locs()->in(2).IsConstant()) {
const Object& constant = locs()->in(2).constant();
__ StoreIntoObjectNoBarrier(array, element_address, constant);
} else {
const Register value = locs()->in(2).reg();
__ StoreIntoObjectNoBarrier(array, element_address, value);
}
break;
case kTypedDataInt8ArrayCid:
case kTypedDataUint8ArrayCid:
case kExternalTypedDataUint8ArrayCid:
case kOneByteStringCid: {
ASSERT(RequiredInputRepresentation(2) == kUnboxedIntPtr);
if (locs()->in(2).IsConstant()) {
const Smi& constant = Smi::Cast(locs()->in(2).constant());
__ LoadImmediate(TMP, static_cast<int8_t>(constant.Value()));
__ sb(TMP, element_address);
} else {
const Register value = locs()->in(2).reg();
__ sb(value, element_address);
}
break;
}
case kTypedDataUint8ClampedArrayCid:
case kExternalTypedDataUint8ClampedArrayCid: {
ASSERT(RequiredInputRepresentation(2) == kUnboxedIntPtr);
if (locs()->in(2).IsConstant()) {
const Smi& constant = Smi::Cast(locs()->in(2).constant());
intptr_t value = constant.Value();
// Clamp to 0x0 or 0xFF respectively.
if (value > 0xFF) {
value = 0xFF;
} else if (value < 0) {
value = 0;
}
__ LoadImmediate(TMP, static_cast<int8_t>(value));
__ sb(TMP, element_address);
} else {
const Register value = locs()->in(2).reg();
compiler::Label store_zero, store_ff, done;
__ blt(value, ZR, &store_zero, compiler::Assembler::kNearJump);
__ li(TMP, 0xFF);
__ bgt(value, TMP, &store_ff, compiler::Assembler::kNearJump);
__ sb(value, element_address);
__ j(&done, compiler::Assembler::kNearJump);
__ Bind(&store_zero);
__ mv(TMP, ZR);
__ Bind(&store_ff);
__ sb(TMP, element_address);
__ Bind(&done);
}
break;
}
case kTwoByteStringCid:
case kTypedDataInt16ArrayCid:
case kTypedDataUint16ArrayCid: {
ASSERT(RequiredInputRepresentation(2) == kUnboxedIntPtr);
const Register value = locs()->in(2).reg();
__ sh(value, element_address);
break;
}
case kTypedDataInt32ArrayCid:
case kTypedDataUint32ArrayCid: {
const Register value = locs()->in(2).reg();
__ sw(value, element_address);
break;
}
case kTypedDataInt64ArrayCid:
case kTypedDataUint64ArrayCid: {
#if XLEN >= 64
const Register value = locs()->in(2).reg();
__ sd(value, element_address);
#else
PairLocation* value_pair = locs()->in(2).AsPairLocation();
Register value_lo = value_pair->At(0).reg();
Register value_hi = value_pair->At(1).reg();
__ sw(value_lo, element_address);
__ sw(value_hi, compiler::Address(element_address.base(),
element_address.offset() + 4));
#endif
break;
}
case kTypedDataFloat32ArrayCid: {
const FRegister value_reg = locs()->in(2).fpu_reg();
__ fsw(value_reg, element_address);
break;
}
case kTypedDataFloat64ArrayCid: {
const FRegister value_reg = locs()->in(2).fpu_reg();
__ fsd(value_reg, element_address);
break;
}
case kTypedDataFloat64x2ArrayCid:
case kTypedDataInt32x4ArrayCid:
case kTypedDataFloat32x4ArrayCid: {
UNIMPLEMENTED();
break;
}
default:
UNREACHABLE();
}
}
static void LoadValueCid(FlowGraphCompiler* compiler,
Register value_cid_reg,
Register value_reg,
compiler::Label* value_is_smi = NULL) {
compiler::Label done;
if (value_is_smi == NULL) {
__ LoadImmediate(value_cid_reg, kSmiCid);
}
__ BranchIfSmi(value_reg, value_is_smi == NULL ? &done : value_is_smi);
__ LoadClassId(value_cid_reg, value_reg);
__ Bind(&done);
}
DEFINE_UNIMPLEMENTED_INSTRUCTION(GuardFieldTypeInstr)
DEFINE_UNIMPLEMENTED_INSTRUCTION(CheckConditionInstr)
LocationSummary* GuardFieldClassInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
const intptr_t value_cid = value()->Type()->ToCid();
const intptr_t field_cid = field().guarded_cid();
const bool emit_full_guard = !opt || (field_cid == kIllegalCid);
const bool needs_value_cid_temp_reg =
emit_full_guard || ((value_cid == kDynamicCid) && (field_cid != kSmiCid));
const bool needs_field_temp_reg = emit_full_guard;
intptr_t num_temps = 0;
if (needs_value_cid_temp_reg) {
num_temps++;
}
if (needs_field_temp_reg) {
num_temps++;
}
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, num_temps, LocationSummary::kNoCall);
summary->set_in(0, Location::RequiresRegister());
for (intptr_t i = 0; i < num_temps; i++) {
summary->set_temp(i, Location::RequiresRegister());
}
return summary;
}
void GuardFieldClassInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
ASSERT(compiler::target::UntaggedObject::kClassIdTagSize == 16);
ASSERT(sizeof(UntaggedField::guarded_cid_) == 2);
ASSERT(sizeof(UntaggedField::is_nullable_) == 2);
const intptr_t value_cid = value()->Type()->ToCid();
const intptr_t field_cid = field().guarded_cid();
const intptr_t nullability = field().is_nullable() ? kNullCid : kIllegalCid;
if (field_cid == kDynamicCid) {
return; // Nothing to emit.
}
const bool emit_full_guard =
!compiler->is_optimizing() || (field_cid == kIllegalCid);
const bool needs_value_cid_temp_reg =
emit_full_guard || ((value_cid == kDynamicCid) && (field_cid != kSmiCid));
const bool needs_field_temp_reg = emit_full_guard;
const Register value_reg = locs()->in(0).reg();
const Register value_cid_reg =
needs_value_cid_temp_reg ? locs()->temp(0).reg() : kNoRegister;
const Register field_reg = needs_field_temp_reg
? locs()->temp(locs()->temp_count() - 1).reg()
: kNoRegister;
compiler::Label ok, fail_label;
compiler::Label* deopt =
compiler->is_optimizing()
? compiler->AddDeoptStub(deopt_id(), ICData::kDeoptGuardField)
: NULL;
compiler::Label* fail = (deopt != NULL) ? deopt : &fail_label;
if (emit_full_guard) {
__ LoadObject(field_reg, Field::ZoneHandle((field().Original())));
compiler::FieldAddress field_cid_operand(field_reg,
Field::guarded_cid_offset());
compiler::FieldAddress field_nullability_operand(
field_reg, Field::is_nullable_offset());
if (value_cid == kDynamicCid) {
LoadValueCid(compiler, value_cid_reg, value_reg);
compiler::Label skip_length_check;
__ lhu(TMP, field_cid_operand);
__ CompareRegisters(value_cid_reg, TMP);
__ BranchIf(EQ, &ok);
__ lhu(TMP, field_nullability_operand);
__ CompareRegisters(value_cid_reg, TMP);
} else if (value_cid == kNullCid) {
__ lhu(value_cid_reg, field_nullability_operand);
__ CompareImmediate(value_cid_reg, value_cid);
} else {
compiler::Label skip_length_check;
__ lhu(value_cid_reg, field_cid_operand);
__ CompareImmediate(value_cid_reg, value_cid);
}
__ BranchIf(EQ, &ok);
// Check if the tracked state of the guarded field can be initialized
// inline. If the field needs length check we fall through to runtime
// which is responsible for computing offset of the length field
// based on the class id.
// Length guard will be emitted separately when needed via GuardFieldLength
// instruction after GuardFieldClass.
if (!field().needs_length_check()) {
// Uninitialized field can be handled inline. Check if the
// field is still unitialized.
__ lhu(TMP, field_cid_operand);
__ CompareImmediate(TMP, kIllegalCid);
__ BranchIf(NE, fail);
if (value_cid == kDynamicCid) {
__ sh(value_cid_reg, field_cid_operand);
__ sh(value_cid_reg, field_nullability_operand);
} else {
__ LoadImmediate(TMP, value_cid);
__ sh(TMP, field_cid_operand);
__ sh(TMP, field_nullability_operand);
}
__ j(&ok);
}
if (deopt == NULL) {
__ Bind(fail);
__ LoadFieldFromOffset(TMP, field_reg, Field::guarded_cid_offset(),
compiler::kUnsignedTwoBytes);
__ CompareImmediate(TMP, kDynamicCid);
__ BranchIf(EQ, &ok);
__ PushRegisterPair(value_reg, field_reg);
ASSERT(!compiler->is_optimizing()); // No deopt info needed.
__ CallRuntime(kUpdateFieldCidRuntimeEntry, 2);
__ Drop(2); // Drop the field and the value.
} else {
__ j(fail);
}
} else {
ASSERT(compiler->is_optimizing());
ASSERT(deopt != NULL);
// Field guard class has been initialized and is known.
if (value_cid == kDynamicCid) {
// Value's class id is not known.
__ TestImmediate(value_reg, kSmiTagMask);
if (field_cid != kSmiCid) {
__ BranchIf(EQ, fail);
__ LoadClassId(value_cid_reg, value_reg);
__ CompareImmediate(value_cid_reg, field_cid);
}
if (field().is_nullable() && (field_cid != kNullCid)) {
__ BranchIf(EQ, &ok);
__ CompareObject(value_reg, Object::null_object());
}
__ BranchIf(NE, fail);
} else if (value_cid == field_cid) {
// This would normaly be caught by Canonicalize, but RemoveRedefinitions
// may sometimes produce the situation after the last Canonicalize pass.
} else {
// Both value's and field's class id is known.
ASSERT(value_cid != nullability);
__ j(fail);
}
}
__ Bind(&ok);
}
LocationSummary* GuardFieldLengthInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
if (!opt || (field().guarded_list_length() == Field::kUnknownFixedLength)) {
const intptr_t kNumTemps = 3;
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
summary->set_in(0, Location::RequiresRegister());
// We need temporaries for field object, length offset and expected length.
summary->set_temp(0, Location::RequiresRegister());
summary->set_temp(1, Location::RequiresRegister());
summary->set_temp(2, Location::RequiresRegister());
return summary;
} else {
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, 0, LocationSummary::kNoCall);
summary->set_in(0, Location::RequiresRegister());
return summary;
}
UNREACHABLE();
}
void GuardFieldLengthInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
if (field().guarded_list_length() == Field::kNoFixedLength) {
return; // Nothing to emit.
}
compiler::Label* deopt =
compiler->is_optimizing()
? compiler->AddDeoptStub(deopt_id(), ICData::kDeoptGuardField)
: NULL;
const Register value_reg = locs()->in(0).reg();
if (!compiler->is_optimizing() ||
(field().guarded_list_length() == Field::kUnknownFixedLength)) {
const Register field_reg = locs()->temp(0).reg();
const Register offset_reg = locs()->temp(1).reg();
const Register length_reg = locs()->temp(2).reg();
compiler::Label ok;
__ LoadObject(field_reg, Field::ZoneHandle(field().Original()));
__ lb(offset_reg,
compiler::FieldAddress(
field_reg, Field::guarded_list_length_in_object_offset_offset()));
__ LoadCompressed(
length_reg,
compiler::FieldAddress(field_reg, Field::guarded_list_length_offset()));
__ bltz(offset_reg, &ok, compiler::Assembler::kNearJump);
// Load the length from the value. GuardFieldClass already verified that
// value's class matches guarded class id of the field.
// offset_reg contains offset already corrected by -kHeapObjectTag that is
// why we use Address instead of FieldAddress.
__ add(TMP, value_reg, offset_reg);
__ lx(TMP, compiler::Address(TMP, 0));
__ CompareObjectRegisters(length_reg, TMP);
if (deopt == NULL) {
__ BranchIf(EQ, &ok);
__ PushRegisterPair(value_reg, field_reg);
ASSERT(!compiler->is_optimizing()); // No deopt info needed.
__ CallRuntime(kUpdateFieldCidRuntimeEntry, 2);
__ Drop(2); // Drop the field and the value.
} else {
__ BranchIf(NE, deopt);
}
__ Bind(&ok);
} else {
ASSERT(compiler->is_optimizing());
ASSERT(field().guarded_list_length() >= 0);
ASSERT(field().guarded_list_length_in_object_offset() !=
Field::kUnknownLengthOffset);
__ lx(TMP, compiler::FieldAddress(
value_reg, field().guarded_list_length_in_object_offset()));
__ CompareImmediate(TMP, Smi::RawValue(field().guarded_list_length()));
__ BranchIf(NE, deopt);
}
}
static void EnsureMutableBox(FlowGraphCompiler* compiler,
StoreInstanceFieldInstr* instruction,
Register box_reg,
const Class& cls,
Register instance_reg,
intptr_t offset,
Register temp) {
compiler::Label done;
__ LoadCompressedFieldFromOffset(box_reg, instance_reg, offset);
__ CompareObject(box_reg, Object::null_object());
__ BranchIf(NE, &done);
BoxAllocationSlowPath::Allocate(compiler, instruction, cls, box_reg, temp);
__ MoveRegister(temp, box_reg);
__ StoreCompressedIntoObjectOffset(instance_reg, offset, temp,
compiler::Assembler::kValueIsNotSmi);
__ Bind(&done);
}
LocationSummary* StoreInstanceFieldInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 2;
const intptr_t kNumTemps = (IsUnboxedDartFieldStore() && opt)
? (FLAG_precompiled_mode ? 0 : 2)
: (IsPotentialUnboxedDartFieldStore() ? 2 : 0);
LocationSummary* summary = new (zone) LocationSummary(
zone, kNumInputs, kNumTemps,
(!FLAG_precompiled_mode &&
((IsUnboxedDartFieldStore() && opt && is_initialization()) ||
IsPotentialUnboxedDartFieldStore()))
? LocationSummary::kCallOnSlowPath
: LocationSummary::kNoCall);
summary->set_in(kInstancePos, Location::RequiresRegister());
if (slot().representation() != kTagged) {
ASSERT(RepresentationUtils::IsUnboxedInteger(slot().representation()));
const size_t value_size =
RepresentationUtils::ValueSize(slot().representation());
if (value_size <= compiler::target::kWordSize) {
summary->set_in(kValuePos, Location::RequiresRegister());
} else {
#if XLEN == 32
ASSERT(value_size <= 2 * compiler::target::kWordSize);
summary->set_in(kValuePos, Location::Pair(Location::RequiresRegister(),
Location::RequiresRegister()));
#else
UNREACHABLE();
#endif
}
} else if (IsUnboxedDartFieldStore() && opt) {
summary->set_in(kValuePos, Location::RequiresFpuRegister());
if (!FLAG_precompiled_mode) {
summary->set_temp(0, Location::RequiresRegister());
summary->set_temp(1, Location::RequiresRegister());
}
} else if (IsPotentialUnboxedDartFieldStore()) {
summary->set_in(kValuePos, ShouldEmitStoreBarrier()
? Location::WritableRegister()
: Location::RequiresRegister());
summary->set_temp(0, Location::RequiresRegister());
summary->set_temp(1, Location::RequiresRegister());
} else {
summary->set_in(kValuePos,
ShouldEmitStoreBarrier()
? Location::RegisterLocation(kWriteBarrierValueReg)
: LocationRegisterOrConstant(value()));
}
return summary;
}
void StoreInstanceFieldInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
ASSERT(compiler::target::UntaggedObject::kClassIdTagSize == 16);
ASSERT(sizeof(UntaggedField::guarded_cid_) == 2);
ASSERT(sizeof(UntaggedField::is_nullable_) == 2);
compiler::Label skip_store;
const Register instance_reg = locs()->in(kInstancePos).reg();
const intptr_t offset_in_bytes = OffsetInBytes();
ASSERT(offset_in_bytes > 0); // Field is finalized and points after header.
if (slot().representation() != kTagged) {
ASSERT(memory_order_ != compiler::AssemblerBase::kRelease);
auto const rep = slot().representation();
ASSERT(RepresentationUtils::IsUnboxedInteger(rep));
const size_t value_size = RepresentationUtils::ValueSize(rep);
__ Comment("NativeUnboxedStoreInstanceFieldInstr");
if (value_size <= compiler::target::kWordSize) {
const Register value = locs()->in(kValuePos).reg();
__ StoreFieldToOffset(value, instance_reg, offset_in_bytes,
RepresentationUtils::OperandSize(rep));
} else {
#if XLEN == 32
auto const in_pair = locs()->in(kValuePos).AsPairLocation();
const Register in_lo = in_pair->At(0).reg();
const Register in_hi = in_pair->At(1).reg();
const intptr_t offset_lo = OffsetInBytes() - kHeapObjectTag;
const intptr_t offset_hi = offset_lo + compiler::target::kWordSize;
__ StoreToOffset(in_lo, instance_reg, offset_lo);
__ StoreToOffset(in_hi, instance_reg, offset_hi);
#else
UNREACHABLE();
#endif
}
return;
}
if (IsUnboxedDartFieldStore() && compiler->is_optimizing()) {
ASSERT(memory_order_ != compiler::AssemblerBase::kRelease);
const FRegister value = locs()->in(kValuePos).fpu_reg();
const intptr_t cid = slot().field().UnboxedFieldCid();