blob: d5ca6badfe313685e577c5115d8c2ab345820643 [file] [log] [blame]
// Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
// for details. All rights reserved. Use of this source code is governed by a
// BSD-style license that can be found in the LICENSE file.
#include "platform/globals.h"
#include "vm/globals.h" // Needed here to get TARGET_ARCH_X64.
#if defined(TARGET_ARCH_X64)
#include "vm/compiler/backend/il.h"
#include "vm/compiler/assembler/assembler.h"
#include "vm/compiler/backend/flow_graph.h"
#include "vm/compiler/backend/flow_graph_compiler.h"
#include "vm/compiler/backend/locations.h"
#include "vm/compiler/backend/locations_helpers.h"
#include "vm/compiler/backend/range_analysis.h"
#include "vm/compiler/ffi/native_calling_convention.h"
#include "vm/compiler/jit/compiler.h"
#include "vm/dart_entry.h"
#include "vm/instructions.h"
#include "vm/object_store.h"
#include "vm/parser.h"
#include "vm/stack_frame.h"
#include "vm/stub_code.h"
#include "vm/symbols.h"
#include "vm/type_testing_stubs.h"
#define __ compiler->assembler()->
#define Z (compiler->zone())
namespace dart {
// Generic summary for call instructions that have all arguments pushed
// on the stack and return the result in a fixed register RAX (or XMM0 if
// the return type is double).
LocationSummary* Instruction::MakeCallSummary(Zone* zone,
const Instruction* instr,
LocationSummary* locs) {
ASSERT(locs == nullptr || locs->always_calls());
LocationSummary* result =
((locs == nullptr)
? (new (zone) LocationSummary(zone, 0, 0, LocationSummary::kCall))
: locs);
const auto representation = instr->representation();
switch (representation) {
case kTagged:
case kUnboxedInt64:
result->set_out(
0, Location::RegisterLocation(CallingConventions::kReturnReg));
break;
case kUnboxedDouble:
result->set_out(
0, Location::FpuRegisterLocation(CallingConventions::kReturnFpuReg));
break;
default:
UNREACHABLE();
break;
}
return result;
}
LocationSummary* LoadIndexedUnsafeInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
const intptr_t kNumTemps = 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::RequiresRegister());
switch (representation()) {
case kTagged:
case kUnboxedInt64:
locs->set_out(0, Location::RequiresRegister());
break;
case kUnboxedDouble:
locs->set_out(0, Location::RequiresFpuRegister());
break;
default:
UNREACHABLE();
break;
}
return locs;
}
void LoadIndexedUnsafeInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
ASSERT(RequiredInputRepresentation(0) == kTagged); // It is a Smi.
ASSERT(kSmiTag == 0);
ASSERT(kSmiTagSize == 1);
const Register index = locs()->in(0).reg();
#if defined(DART_COMPRESSED_POINTERS)
// No addressing mode will ignore the upper bits. Cannot use the shorter `orl`
// to clear the upper bits as this instructions uses negative indices as part
// of FP-relative loads.
// TODO(compressed-pointers): Can we guarantee the index is already
// sign-extended if always comes for an args-descriptor load?
__ movsxd(index, index);
#endif
switch (representation()) {
case kTagged:
case kUnboxedInt64: {
const auto out = locs()->out(0).reg();
__ movq(out, compiler::Address(base_reg(), index, TIMES_4, offset()));
break;
}
case kUnboxedDouble: {
const auto out = locs()->out(0).fpu_reg();
__ movsd(out, compiler::Address(base_reg(), index, TIMES_4, offset()));
break;
}
default:
UNREACHABLE();
break;
}
}
DEFINE_BACKEND(StoreIndexedUnsafe,
(NoLocation, Register index, Register value)) {
ASSERT(instr->RequiredInputRepresentation(
StoreIndexedUnsafeInstr::kIndexPos) == kTagged); // It is a Smi.
#if defined(DART_COMPRESSED_POINTERS)
// No addressing mode will ignore the upper bits. Cannot use the shorter `orl`
// to clear the upper bits as this instructions uses negative indices as part
// of FP-relative stores.
// TODO(compressed-pointers): Can we guarantee the index is already
// sign-extended if always comes for an args-descriptor load?
__ movsxd(index, index);
#endif
__ movq(compiler::Address(instr->base_reg(), index, TIMES_4, instr->offset()),
value);
ASSERT(kSmiTag == 0);
ASSERT(kSmiTagSize == 1);
}
DEFINE_BACKEND(TailCall, (NoLocation, Fixed<Register, ARGS_DESC_REG>)) {
compiler->EmitTailCallToStub(instr->code());
// Even though the TailCallInstr will be the last instruction in a basic
// block, the flow graph compiler will emit native code for other blocks after
// the one containing this instruction and needs to be able to use the pool.
// (The `LeaveDartFrame` above disables usages of the pool.)
__ set_constant_pool_allowed(true);
}
LocationSummary* MemoryCopyInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 5;
const intptr_t kNumTemps = 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(kSrcPos, Location::RegisterLocation(RSI));
locs->set_in(kDestPos, Location::RegisterLocation(RDI));
locs->set_in(kSrcStartPos, Location::WritableRegister());
locs->set_in(kDestStartPos, Location::WritableRegister());
locs->set_in(kLengthPos, Location::RegisterLocation(RCX));
return locs;
}
void MemoryCopyInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
const Register src_start_reg = locs()->in(kSrcStartPos).reg();
const Register dest_start_reg = locs()->in(kDestStartPos).reg();
EmitComputeStartPointer(compiler, src_cid_, src_start(), RSI, src_start_reg);
EmitComputeStartPointer(compiler, dest_cid_, dest_start(), RDI,
dest_start_reg);
if (element_size_ <= 8) {
__ SmiUntag(RCX);
} else {
#if defined(DART_COMPRESSED_POINTERS)
__ orl(RCX, RCX);
#endif
}
switch (element_size_) {
case 1:
__ rep_movsb();
break;
case 2:
__ rep_movsw();
break;
case 4:
__ rep_movsl();
break;
case 8:
case 16:
__ rep_movsq();
break;
}
}
void MemoryCopyInstr::EmitComputeStartPointer(FlowGraphCompiler* compiler,
classid_t array_cid,
Value* start,
Register array_reg,
Register start_reg) {
intptr_t offset;
if (IsTypedDataBaseClassId(array_cid)) {
__ movq(array_reg,
compiler::FieldAddress(
array_reg, compiler::target::PointerBase::data_offset()));
offset = 0;
} else {
switch (array_cid) {
case kOneByteStringCid:
offset =
compiler::target::OneByteString::data_offset() - kHeapObjectTag;
break;
case kTwoByteStringCid:
offset =
compiler::target::TwoByteString::data_offset() - kHeapObjectTag;
break;
case kExternalOneByteStringCid:
__ movq(array_reg,
compiler::FieldAddress(array_reg,
compiler::target::ExternalOneByteString::
external_data_offset()));
offset = 0;
break;
case kExternalTwoByteStringCid:
__ movq(array_reg,
compiler::FieldAddress(array_reg,
compiler::target::ExternalTwoByteString::
external_data_offset()));
offset = 0;
break;
default:
UNREACHABLE();
break;
}
}
ScaleFactor scale;
switch (element_size_) {
case 1:
__ SmiUntag(start_reg);
scale = TIMES_1;
break;
case 2:
#if defined(DART_COMPRESSED_POINTERS)
// Clear garbage upper bits, as no form of lea will ignore them. Assume
// start is positive to use the shorter orl over the longer movsxd.
__ orl(start_reg, start_reg);
#endif
scale = TIMES_1;
break;
case 4:
#if defined(DART_COMPRESSED_POINTERS)
__ orl(start_reg, start_reg);
#endif
scale = TIMES_2;
break;
case 8:
#if defined(DART_COMPRESSED_POINTERS)
__ orl(start_reg, start_reg);
#endif
scale = TIMES_4;
break;
case 16:
#if defined(DART_COMPRESSED_POINTERS)
__ orl(start_reg, start_reg);
#endif
scale = TIMES_8;
break;
default:
UNREACHABLE();
break;
}
__ leaq(array_reg, compiler::Address(array_reg, start_reg, scale, offset));
}
LocationSummary* PushArgumentInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
const intptr_t kNumTemps = 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
if (representation() == kUnboxedDouble) {
locs->set_in(0, Location::RequiresFpuRegister());
} else if (representation() == kUnboxedInt64) {
locs->set_in(0, Location::RequiresRegister());
} else {
locs->set_in(0, LocationAnyOrConstant(value()));
}
return locs;
}
void PushArgumentInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// In SSA mode, we need an explicit push. Nothing to do in non-SSA mode
// where arguments are pushed by their definitions.
if (compiler->is_optimizing()) {
Location value = locs()->in(0);
if (value.IsRegister()) {
__ pushq(value.reg());
} else if (value.IsConstant()) {
__ PushObject(value.constant());
} else if (value.IsFpuRegister()) {
__ AddImmediate(RSP, compiler::Immediate(-kDoubleSize));
__ movsd(compiler::Address(RSP, 0), value.fpu_reg());
} else {
ASSERT(value.IsStackSlot());
__ pushq(LocationToStackSlotAddress(value));
}
}
}
LocationSummary* ReturnInstr::MakeLocationSummary(Zone* zone, bool opt) const {
const intptr_t kNumInputs = 1;
const intptr_t kNumTemps = 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
switch (representation()) {
case kTagged:
case kUnboxedInt64:
locs->set_in(0,
Location::RegisterLocation(CallingConventions::kReturnReg));
break;
case kUnboxedDouble:
locs->set_in(
0, Location::FpuRegisterLocation(CallingConventions::kReturnFpuReg));
break;
default:
UNREACHABLE();
break;
}
return locs;
}
// Attempt optimized compilation at return instruction instead of at the entry.
// The entry needs to be patchable, no inlined objects are allowed in the area
// that will be overwritten by the patch instruction: a jump).
void ReturnInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
if (locs()->in(0).IsRegister()) {
const Register result = locs()->in(0).reg();
ASSERT(result == CallingConventions::kReturnReg);
} else {
ASSERT(locs()->in(0).IsFpuRegister());
const FpuRegister result = locs()->in(0).fpu_reg();
ASSERT(result == CallingConventions::kReturnFpuReg);
}
if (!compiler->flow_graph().graph_entry()->NeedsFrame()) {
__ ret();
return;
}
#if defined(DEBUG)
__ Comment("Stack Check");
compiler::Label done;
const intptr_t fp_sp_dist =
(compiler::target::frame_layout.first_local_from_fp + 1 -
compiler->StackSize()) *
kWordSize;
ASSERT(fp_sp_dist <= 0);
__ movq(RDI, RSP);
__ subq(RDI, RBP);
__ CompareImmediate(RDI, compiler::Immediate(fp_sp_dist));
__ j(EQUAL, &done, compiler::Assembler::kNearJump);
__ int3();
__ Bind(&done);
#endif
ASSERT(__ constant_pool_allowed());
if (yield_index() != UntaggedPcDescriptors::kInvalidYieldIndex) {
compiler->EmitYieldPositionMetadata(source(), yield_index());
}
__ LeaveDartFrame(); // Disallows constant pool use.
__ ret();
// This ReturnInstr may be emitted out of order by the optimizer. The next
// block may be a target expecting a properly set constant pool pointer.
__ set_constant_pool_allowed(true);
}
static const RegisterSet kCalleeSaveRegistersSet(
CallingConventions::kCalleeSaveCpuRegisters,
CallingConventions::kCalleeSaveXmmRegisters);
// Keep in sync with NativeEntryInstr::EmitNativeCode.
void NativeReturnInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
EmitReturnMoves(compiler);
__ LeaveDartFrame();
// Pop dummy return address.
__ popq(TMP);
// Anything besides the return register.
const Register vm_tag_reg = RBX;
const Register old_exit_frame_reg = RCX;
const Register old_exit_through_ffi_reg = RDI;
__ popq(old_exit_frame_reg);
__ popq(old_exit_through_ffi_reg);
// Restore top_resource.
__ popq(TMP);
__ movq(
compiler::Address(THR, compiler::target::Thread::top_resource_offset()),
TMP);
__ popq(vm_tag_reg);
// If we were called by a trampoline, it will enter the safepoint on our
// behalf.
__ TransitionGeneratedToNative(
vm_tag_reg, old_exit_frame_reg, old_exit_through_ffi_reg,
/*enter_safepoint=*/!NativeCallbackTrampolines::Enabled());
// Restore C++ ABI callee-saved registers.
__ PopRegisters(kCalleeSaveRegistersSet);
#if defined(DART_TARGET_OS_FUCHSIA) && defined(USING_SHADOW_CALL_STACK)
#error Unimplemented
#endif
// Leave the entry frame.
__ LeaveFrame();
// Leave the dummy frame holding the pushed arguments.
__ LeaveFrame();
__ ret();
// For following blocks.
__ set_constant_pool_allowed(true);
}
// Detect pattern when one value is zero and another is a power of 2.
static bool IsPowerOfTwoKind(intptr_t v1, intptr_t v2) {
return (Utils::IsPowerOfTwo(v1) && (v2 == 0)) ||
(Utils::IsPowerOfTwo(v2) && (v1 == 0));
}
LocationSummary* IfThenElseInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
comparison()->InitializeLocationSummary(zone, opt);
// TODO(dartbug.com/30952) support convertion of Register to corresponding
// least significant byte register (e.g. RAX -> AL, RSI -> SIL, r15 -> r15b).
comparison()->locs()->set_out(0, Location::RegisterLocation(RDX));
return comparison()->locs();
}
void IfThenElseInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
ASSERT(locs()->out(0).reg() == RDX);
// Clear upper part of the out register. We are going to use setcc on it
// which is a byte move.
__ xorq(RDX, RDX);
// Emit comparison code. This must not overwrite the result register.
// IfThenElseInstr::Supports() should prevent EmitComparisonCode from using
// the labels or returning an invalid condition.
BranchLabels labels = {NULL, NULL, NULL};
Condition true_condition = comparison()->EmitComparisonCode(compiler, labels);
ASSERT(true_condition != kInvalidCondition);
const bool is_power_of_two_kind = IsPowerOfTwoKind(if_true_, if_false_);
intptr_t true_value = if_true_;
intptr_t false_value = if_false_;
if (is_power_of_two_kind) {
if (true_value == 0) {
// We need to have zero in RDX on true_condition.
true_condition = InvertCondition(true_condition);
}
} else {
if (true_value == 0) {
// Swap values so that false_value is zero.
intptr_t temp = true_value;
true_value = false_value;
false_value = temp;
} else {
true_condition = InvertCondition(true_condition);
}
}
__ setcc(true_condition, DL);
if (is_power_of_two_kind) {
const intptr_t shift =
Utils::ShiftForPowerOfTwo(Utils::Maximum(true_value, false_value));
__ shlq(RDX, compiler::Immediate(shift + kSmiTagSize));
} else {
__ decq(RDX);
__ AndImmediate(RDX, compiler::Immediate(Smi::RawValue(true_value) -
Smi::RawValue(false_value)));
if (false_value != 0) {
__ AddImmediate(RDX, compiler::Immediate(Smi::RawValue(false_value)));
}
}
}
LocationSummary* LoadLocalInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 0;
const intptr_t stack_index =
compiler::target::frame_layout.FrameSlotForVariable(&local());
return LocationSummary::Make(zone, kNumInputs,
Location::StackSlot(stack_index, FPREG),
LocationSummary::kNoCall);
}
void LoadLocalInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
ASSERT(!compiler->is_optimizing());
// Nothing to do.
}
LocationSummary* StoreLocalInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
return LocationSummary::Make(zone, kNumInputs, Location::SameAsFirstInput(),
LocationSummary::kNoCall);
}
void StoreLocalInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
Register value = locs()->in(0).reg();
Register result = locs()->out(0).reg();
ASSERT(result == value); // Assert that register assignment is correct.
__ movq(compiler::Address(
RBP, compiler::target::FrameOffsetInBytesForVariable(&local())),
value);
}
LocationSummary* ConstantInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 0;
return LocationSummary::Make(zone, kNumInputs,
compiler::Assembler::IsSafe(value())
? Location::Constant(this)
: Location::RequiresRegister(),
LocationSummary::kNoCall);
}
void ConstantInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// The register allocator drops constant definitions that have no uses.
Location out = locs()->out(0);
ASSERT(out.IsRegister() || out.IsConstant() || out.IsInvalid());
if (out.IsRegister()) {
Register result = out.reg();
__ LoadObject(result, value());
}
}
void ConstantInstr::EmitMoveToLocation(FlowGraphCompiler* compiler,
const Location& destination,
Register tmp,
intptr_t pair_index) {
ASSERT(pair_index == 0); // No pair representation needed on 64-bit.
if (destination.IsRegister()) {
if (RepresentationUtils::IsUnboxedInteger(representation())) {
const int64_t value = Integer::Cast(value_).AsInt64Value();
if (value == 0) {
__ xorl(destination.reg(), destination.reg());
} else {
__ movq(destination.reg(), compiler::Immediate(value));
}
} else {
ASSERT(representation() == kTagged);
__ LoadObject(destination.reg(), value_);
}
} else if (destination.IsFpuRegister()) {
__ LoadDImmediate(destination.fpu_reg(), Double::Cast(value_).value());
} else if (destination.IsDoubleStackSlot()) {
__ LoadDImmediate(FpuTMP, Double::Cast(value_).value());
__ movsd(LocationToStackSlotAddress(destination), FpuTMP);
} else {
ASSERT(destination.IsStackSlot());
if (RepresentationUtils::IsUnboxedInteger(representation())) {
const int64_t value = Integer::Cast(value_).AsInt64Value();
__ movq(LocationToStackSlotAddress(destination),
compiler::Immediate(value));
} else {
ASSERT(representation() == kTagged);
__ StoreObject(LocationToStackSlotAddress(destination), value_);
}
}
}
LocationSummary* UnboxedConstantInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const bool is_unboxed_int =
RepresentationUtils::IsUnboxedInteger(representation());
ASSERT(!is_unboxed_int || RepresentationUtils::ValueSize(representation()) <=
compiler::target::kWordSize);
const intptr_t kNumInputs = 0;
const intptr_t kNumTemps = is_unboxed_int ? 0 : 1;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
if (is_unboxed_int) {
locs->set_out(0, Location::RequiresRegister());
} else {
switch (representation()) {
case kUnboxedDouble:
locs->set_out(0, Location::RequiresFpuRegister());
locs->set_temp(0, Location::RequiresRegister());
break;
default:
UNREACHABLE();
break;
}
}
return locs;
}
void UnboxedConstantInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// The register allocator drops constant definitions that have no uses.
if (!locs()->out(0).IsInvalid()) {
const Register scratch =
RepresentationUtils::IsUnboxedInteger(representation())
? kNoRegister
: locs()->temp(0).reg();
EmitMoveToLocation(compiler, locs()->out(0), scratch);
}
}
LocationSummary* AssertAssignableInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
auto const dst_type_loc =
LocationFixedRegisterOrConstant(dst_type(), TypeTestABI::kDstTypeReg);
// We want to prevent spilling of the inputs (e.g. function/instantiator tav),
// since TTS preserves them. So we make this a `kNoCall` summary,
// even though most other registers can be modified by the stub. To tell the
// register allocator about it, we reserve all the other registers as
// temporary registers.
// TODO(http://dartbug.com/32788): Simplify this.
const intptr_t kNonChangeableInputRegs =
(1 << TypeTestABI::kInstanceReg) |
((dst_type_loc.IsRegister() ? 1 : 0) << TypeTestABI::kDstTypeReg) |
(1 << TypeTestABI::kInstantiatorTypeArgumentsReg) |
(1 << TypeTestABI::kFunctionTypeArgumentsReg);
const intptr_t kNumInputs = 4;
// We invoke a stub that can potentially clobber any CPU register
// but can only clobber FPU registers on the slow path when
// entering runtime. Preserve all FPU registers that are
// not guarateed to be preserved by the ABI.
const intptr_t kCpuRegistersToPreserve =
kDartAvailableCpuRegs & ~kNonChangeableInputRegs;
const intptr_t kFpuRegistersToPreserve =
CallingConventions::kVolatileXmmRegisters & ~(1 << FpuTMP);
const intptr_t kNumTemps = (Utils::CountOneBits64(kCpuRegistersToPreserve) +
Utils::CountOneBits64(kFpuRegistersToPreserve));
LocationSummary* summary = new (zone) LocationSummary(
zone, kNumInputs, kNumTemps, LocationSummary::kCallCalleeSafe);
summary->set_in(kInstancePos,
Location::RegisterLocation(TypeTestABI::kInstanceReg));
summary->set_in(kDstTypePos, dst_type_loc);
summary->set_in(
kInstantiatorTAVPos,
Location::RegisterLocation(TypeTestABI::kInstantiatorTypeArgumentsReg));
summary->set_in(kFunctionTAVPos, Location::RegisterLocation(
TypeTestABI::kFunctionTypeArgumentsReg));
summary->set_out(0, Location::SameAsFirstInput());
// Let's reserve all registers except for the input ones.
intptr_t next_temp = 0;
for (intptr_t i = 0; i < kNumberOfCpuRegisters; ++i) {
const bool should_preserve = ((1 << i) & kCpuRegistersToPreserve) != 0;
if (should_preserve) {
summary->set_temp(next_temp++,
Location::RegisterLocation(static_cast<Register>(i)));
}
}
for (intptr_t i = 0; i < kNumberOfFpuRegisters; i++) {
const bool should_preserve = ((1 << i) & kFpuRegistersToPreserve) != 0;
if (should_preserve) {
summary->set_temp(next_temp++, Location::FpuRegisterLocation(
static_cast<FpuRegister>(i)));
}
}
return summary;
}
void AssertBooleanInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
ASSERT(locs()->always_calls());
auto object_store = compiler->isolate_group()->object_store();
const auto& assert_boolean_stub =
Code::ZoneHandle(compiler->zone(), object_store->assert_boolean_stub());
compiler::Label done;
__ testq(
AssertBooleanABI::kObjectReg,
compiler::Immediate(compiler::target::ObjectAlignment::kBoolVsNullMask));
__ j(NOT_ZERO, &done, compiler::Assembler::kNearJump);
compiler->GenerateStubCall(source(), assert_boolean_stub,
/*kind=*/UntaggedPcDescriptors::kOther, locs(),
deopt_id(), env());
__ Bind(&done);
}
static Condition TokenKindToIntCondition(Token::Kind kind) {
switch (kind) {
case Token::kEQ:
return EQUAL;
case Token::kNE:
return NOT_EQUAL;
case Token::kLT:
return LESS;
case Token::kGT:
return GREATER;
case Token::kLTE:
return LESS_EQUAL;
case Token::kGTE:
return GREATER_EQUAL;
default:
UNREACHABLE();
return OVERFLOW;
}
}
LocationSummary* EqualityCompareInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 2;
if (operation_cid() == kDoubleCid) {
const intptr_t kNumTemps = 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::RequiresFpuRegister());
locs->set_in(1, Location::RequiresFpuRegister());
locs->set_out(0, Location::RequiresRegister());
return locs;
}
if (operation_cid() == kSmiCid || operation_cid() == kMintCid) {
const intptr_t kNumTemps = 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
if (is_null_aware()) {
locs->set_in(0, Location::RequiresRegister());
locs->set_in(1, Location::RequiresRegister());
} else {
locs->set_in(0, LocationRegisterOrConstant(left()));
// Only one input can be a constant operand. The case of two constant
// operands should be handled by constant propagation.
// Only right can be a stack slot.
locs->set_in(1, locs->in(0).IsConstant()
? Location::RequiresRegister()
: LocationRegisterOrConstant(right()));
}
locs->set_out(0, Location::RequiresRegister());
return locs;
}
UNREACHABLE();
return NULL;
}
static void LoadValueCid(FlowGraphCompiler* compiler,
Register value_cid_reg,
Register value_reg,
compiler::Label* value_is_smi = NULL) {
compiler::Label done;
if (value_is_smi == NULL) {
__ LoadImmediate(value_cid_reg, compiler::Immediate(kSmiCid));
}
__ testq(value_reg, compiler::Immediate(kSmiTagMask));
if (value_is_smi == NULL) {
__ j(ZERO, &done, compiler::Assembler::kNearJump);
} else {
__ j(ZERO, value_is_smi);
}
__ LoadClassId(value_cid_reg, value_reg);
__ Bind(&done);
}
static Condition FlipCondition(Condition condition) {
switch (condition) {
case EQUAL:
return EQUAL;
case NOT_EQUAL:
return NOT_EQUAL;
case LESS:
return GREATER;
case LESS_EQUAL:
return GREATER_EQUAL;
case GREATER:
return LESS;
case GREATER_EQUAL:
return LESS_EQUAL;
case BELOW:
return ABOVE;
case BELOW_EQUAL:
return ABOVE_EQUAL;
case ABOVE:
return BELOW;
case ABOVE_EQUAL:
return BELOW_EQUAL;
default:
UNIMPLEMENTED();
return EQUAL;
}
}
static void EmitBranchOnCondition(
FlowGraphCompiler* compiler,
Condition true_condition,
BranchLabels labels,
compiler::Assembler::JumpDistance jump_distance =
compiler::Assembler::kFarJump) {
if (labels.fall_through == labels.false_label) {
// If the next block is the false successor, fall through to it.
__ j(true_condition, labels.true_label, jump_distance);
} else {
// If the next block is not the false successor, branch to it.
Condition false_condition = InvertCondition(true_condition);
__ j(false_condition, labels.false_label, jump_distance);
// Fall through or jump to the true successor.
if (labels.fall_through != labels.true_label) {
__ jmp(labels.true_label, jump_distance);
}
}
}
static Condition EmitSmiComparisonOp(FlowGraphCompiler* compiler,
const LocationSummary& locs,
Token::Kind kind) {
Location left = locs.in(0);
Location right = locs.in(1);
ASSERT(!left.IsConstant() || !right.IsConstant());
Condition true_condition = TokenKindToIntCondition(kind);
if (left.IsConstant() || right.IsConstant()) {
// Ensure constant is on the right.
ConstantInstr* constant = NULL;
if (left.IsConstant()) {
constant = left.constant_instruction();
Location tmp = right;
right = left;
left = tmp;
true_condition = FlipCondition(true_condition);
} else {
constant = right.constant_instruction();
}
if (RepresentationUtils::IsUnboxedInteger(constant->representation())) {
int64_t value;
const bool ok = compiler::HasIntegerValue(constant->value(), &value);
RELEASE_ASSERT(ok);
__ OBJ(cmp)(left.reg(), compiler::Immediate(value));
} else {
ASSERT(constant->representation() == kTagged);
__ CompareObject(left.reg(), right.constant());
}
} else if (right.IsStackSlot()) {
__ OBJ(cmp)(left.reg(), LocationToStackSlotAddress(right));
} else {
__ OBJ(cmp)(left.reg(), right.reg());
}
return true_condition;
}
static Condition EmitInt64ComparisonOp(FlowGraphCompiler* compiler,
const LocationSummary& locs,
Token::Kind kind) {
Location left = locs.in(0);
Location right = locs.in(1);
ASSERT(!left.IsConstant() || !right.IsConstant());
Condition true_condition = TokenKindToIntCondition(kind);
if (left.IsConstant() || right.IsConstant()) {
// Ensure constant is on the right.
ConstantInstr* constant = NULL;
if (left.IsConstant()) {
constant = left.constant_instruction();
Location tmp = right;
right = left;
left = tmp;
true_condition = FlipCondition(true_condition);
} else {
constant = right.constant_instruction();
}
if (RepresentationUtils::IsUnboxedInteger(constant->representation())) {
int64_t value;
const bool ok = compiler::HasIntegerValue(constant->value(), &value);
RELEASE_ASSERT(ok);
__ cmpq(left.reg(), compiler::Immediate(value));
} else {
UNREACHABLE();
}
} else if (right.IsStackSlot()) {
__ cmpq(left.reg(), LocationToStackSlotAddress(right));
} else {
__ cmpq(left.reg(), right.reg());
}
return true_condition;
}
static Condition EmitNullAwareInt64ComparisonOp(FlowGraphCompiler* compiler,
const LocationSummary& locs,
Token::Kind kind,
BranchLabels labels) {
ASSERT((kind == Token::kEQ) || (kind == Token::kNE));
const Register left = locs.in(0).reg();
const Register right = locs.in(1).reg();
const Condition true_condition = TokenKindToIntCondition(kind);
compiler::Label* equal_result =
(true_condition == EQUAL) ? labels.true_label : labels.false_label;
compiler::Label* not_equal_result =
(true_condition == EQUAL) ? labels.false_label : labels.true_label;
// Check if operands have the same value. If they don't, then they could
// be equal only if both of them are Mints with the same value.
__ OBJ(cmp)(left, right);
__ j(EQUAL, equal_result);
__ OBJ(mov)(TMP, left);
__ OBJ(and)(TMP, right);
__ BranchIfSmi(TMP, not_equal_result);
__ CompareClassId(left, kMintCid);
__ j(NOT_EQUAL, not_equal_result);
__ CompareClassId(right, kMintCid);
__ j(NOT_EQUAL, not_equal_result);
__ movq(TMP, compiler::FieldAddress(left, Mint::value_offset()));
__ cmpq(TMP, compiler::FieldAddress(right, Mint::value_offset()));
return true_condition;
}
static Condition TokenKindToDoubleCondition(Token::Kind kind) {
switch (kind) {
case Token::kEQ:
return EQUAL;
case Token::kNE:
return NOT_EQUAL;
case Token::kLT:
return BELOW;
case Token::kGT:
return ABOVE;
case Token::kLTE:
return BELOW_EQUAL;
case Token::kGTE:
return ABOVE_EQUAL;
default:
UNREACHABLE();
return OVERFLOW;
}
}
static Condition EmitDoubleComparisonOp(FlowGraphCompiler* compiler,
const LocationSummary& locs,
Token::Kind kind,
BranchLabels labels) {
XmmRegister left = locs.in(0).fpu_reg();
XmmRegister right = locs.in(1).fpu_reg();
__ comisd(left, right);
Condition true_condition = TokenKindToDoubleCondition(kind);
compiler::Label* nan_result =
(true_condition == NOT_EQUAL) ? labels.true_label : labels.false_label;
__ j(PARITY_EVEN, nan_result);
return true_condition;
}
Condition EqualityCompareInstr::EmitComparisonCode(FlowGraphCompiler* compiler,
BranchLabels labels) {
if (is_null_aware()) {
ASSERT(operation_cid() == kMintCid);
return EmitNullAwareInt64ComparisonOp(compiler, *locs(), kind(), labels);
}
if (operation_cid() == kSmiCid) {
return EmitSmiComparisonOp(compiler, *locs(), kind());
} else if (operation_cid() == kMintCid) {
return EmitInt64ComparisonOp(compiler, *locs(), kind());
} else {
ASSERT(operation_cid() == kDoubleCid);
return EmitDoubleComparisonOp(compiler, *locs(), kind(), labels);
}
}
void ComparisonInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
compiler::Label is_true, is_false;
BranchLabels labels = {&is_true, &is_false, &is_false};
Condition true_condition = EmitComparisonCode(compiler, labels);
Register result = locs()->out(0).reg();
if (true_condition != kInvalidCondition) {
EmitBranchOnCondition(compiler, true_condition, labels,
compiler::Assembler::kNearJump);
}
// Note: We use branches instead of setcc or cmov even when the branch labels
// are otherwise unused, as this runs faster for the x86 processors tested on
// our benchmarking server.
compiler::Label done;
__ Bind(&is_false);
__ LoadObject(result, Bool::False());
__ jmp(&done, compiler::Assembler::kNearJump);
__ Bind(&is_true);
__ LoadObject(result, Bool::True());
__ Bind(&done);
}
void ComparisonInstr::EmitBranchCode(FlowGraphCompiler* compiler,
BranchInstr* branch) {
BranchLabels labels = compiler->CreateBranchLabels(branch);
Condition true_condition = EmitComparisonCode(compiler, labels);
if (true_condition != kInvalidCondition) {
EmitBranchOnCondition(compiler, true_condition, labels);
}
}
LocationSummary* TestSmiInstr::MakeLocationSummary(Zone* zone, bool opt) const {
const intptr_t kNumInputs = 2;
const intptr_t kNumTemps = 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::RequiresRegister());
// Only one input can be a constant operand. The case of two constant
// operands should be handled by constant propagation.
locs->set_in(1, LocationRegisterOrConstant(right()));
return locs;
}
Condition TestSmiInstr::EmitComparisonCode(FlowGraphCompiler* compiler,
BranchLabels labels) {
Register left_reg = locs()->in(0).reg();
Location right = locs()->in(1);
if (right.IsConstant()) {
ASSERT(right.constant().IsSmi());
const int64_t imm = Smi::RawValue(Smi::Cast(right.constant()).Value());
__ TestImmediate(left_reg, compiler::Immediate(imm),
compiler::kObjectBytes);
} else {
__ OBJ(test)(left_reg, right.reg());
}
Condition true_condition = (kind() == Token::kNE) ? NOT_ZERO : ZERO;
return true_condition;
}
LocationSummary* TestCidsInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
const intptr_t kNumTemps = 1;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::RequiresRegister());
locs->set_temp(0, Location::RequiresRegister());
locs->set_out(0, Location::RequiresRegister());
return locs;
}
Condition TestCidsInstr::EmitComparisonCode(FlowGraphCompiler* compiler,
BranchLabels labels) {
ASSERT((kind() == Token::kIS) || (kind() == Token::kISNOT));
Register val_reg = locs()->in(0).reg();
Register cid_reg = locs()->temp(0).reg();
compiler::Label* deopt =
CanDeoptimize()
? compiler->AddDeoptStub(deopt_id(), ICData::kDeoptTestCids,
licm_hoisted_ ? ICData::kHoisted : 0)
: NULL;
const intptr_t true_result = (kind() == Token::kIS) ? 1 : 0;
const ZoneGrowableArray<intptr_t>& data = cid_results();
ASSERT(data[0] == kSmiCid);
bool result = data[1] == true_result;
__ testq(val_reg, compiler::Immediate(kSmiTagMask));
__ j(ZERO, result ? labels.true_label : labels.false_label);
__ LoadClassId(cid_reg, val_reg);
for (intptr_t i = 2; i < data.length(); i += 2) {
const intptr_t test_cid = data[i];
ASSERT(test_cid != kSmiCid);
result = data[i + 1] == true_result;
__ cmpq(cid_reg, compiler::Immediate(test_cid));
__ j(EQUAL, result ? labels.true_label : labels.false_label);
}
// No match found, deoptimize or default action.
if (deopt == NULL) {
// If the cid is not in the list, jump to the opposite label from the cids
// that are in the list. These must be all the same (see asserts in the
// constructor).
compiler::Label* target = result ? labels.false_label : labels.true_label;
if (target != labels.fall_through) {
__ jmp(target);
}
} else {
__ jmp(deopt);
}
// Dummy result as this method already did the jump, there's no need
// for the caller to branch on a condition.
return kInvalidCondition;
}
LocationSummary* RelationalOpInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 2;
const intptr_t kNumTemps = 0;
if (operation_cid() == kDoubleCid) {
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
summary->set_in(0, Location::RequiresFpuRegister());
summary->set_in(1, Location::RequiresFpuRegister());
summary->set_out(0, Location::RequiresRegister());
return summary;
}
if (operation_cid() == kSmiCid || operation_cid() == kMintCid) {
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
summary->set_in(0, LocationRegisterOrConstant(left()));
// Only one input can be a constant operand. The case of two constant
// operands should be handled by constant propagation.
summary->set_in(1, summary->in(0).IsConstant()
? Location::RequiresRegister()
: LocationRegisterOrConstant(right()));
summary->set_out(0, Location::RequiresRegister());
return summary;
}
UNREACHABLE();
return NULL;
}
Condition RelationalOpInstr::EmitComparisonCode(FlowGraphCompiler* compiler,
BranchLabels labels) {
if (operation_cid() == kSmiCid) {
return EmitSmiComparisonOp(compiler, *locs(), kind());
} else if (operation_cid() == kMintCid) {
return EmitInt64ComparisonOp(compiler, *locs(), kind());
} else {
ASSERT(operation_cid() == kDoubleCid);
return EmitDoubleComparisonOp(compiler, *locs(), kind(), labels);
}
}
void NativeCallInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
SetupNative();
Register result = locs()->out(0).reg();
const intptr_t argc_tag = NativeArguments::ComputeArgcTag(function());
// All arguments are already @RSP due to preceding PushArgument()s.
ASSERT(ArgumentCount() ==
function().NumParameters() + (function().IsGeneric() ? 1 : 0));
// Push the result place holder initialized to NULL.
__ PushObject(Object::null_object());
// Pass a pointer to the first argument in R13 (we avoid using RAX here to
// simplify the stub code that will call native code).
__ leaq(R13, compiler::Address(RSP, ArgumentCount() * kWordSize));
__ LoadImmediate(R10, compiler::Immediate(argc_tag));
const Code* stub;
if (link_lazily()) {
stub = &StubCode::CallBootstrapNative();
compiler::ExternalLabel label(NativeEntry::LinkNativeCallEntry());
__ LoadNativeEntry(RBX, &label,
compiler::ObjectPoolBuilderEntry::kPatchable);
compiler->GeneratePatchableCall(source(), *stub,
UntaggedPcDescriptors::kOther, locs());
} else {
if (is_bootstrap_native()) {
stub = &StubCode::CallBootstrapNative();
} else if (is_auto_scope()) {
stub = &StubCode::CallAutoScopeNative();
} else {
stub = &StubCode::CallNoScopeNative();
}
const compiler::ExternalLabel label(
reinterpret_cast<uword>(native_c_function()));
__ LoadNativeEntry(RBX, &label,
compiler::ObjectPoolBuilderEntry::kNotPatchable);
// We can never lazy-deopt here because natives are never optimized.
ASSERT(!compiler->is_optimizing());
compiler->GenerateNonLazyDeoptableStubCall(
source(), *stub, UntaggedPcDescriptors::kOther, locs());
}
__ popq(result);
__ Drop(ArgumentCount()); // Drop the arguments.
}
LocationSummary* FfiCallInstr::MakeLocationSummary(Zone* zone,
bool is_optimizing) const {
// Use R10 as a temp register. We can't use RDI, RSI, RDX, R8, R9 as they are
// arg registers, and R11 is TMP.
return MakeLocationSummaryInternal(zone, is_optimizing, R10);
}
void FfiCallInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// For leaf calls, this holds the SP used to restore the pre-aligned SP after
// the call.
// Note: R12 doubles as CODE_REG, which gets clobbered during frame setup in
// regular calls.
const Register saved_sp = locs()->temp(0).reg();
// For regular calls, this holds the FP for rebasing the original locations
// during EmitParamMoves.
const Register saved_fp = locs()->temp(1).reg();
const Register temp = locs()->temp(2).reg();
const Register target_address = locs()->in(TargetAddressIndex()).reg();
// Ensure these are callee-saved register and are preserved across the call.
ASSERT((CallingConventions::kCalleeSaveCpuRegisters & (1 << saved_sp)) != 0);
ASSERT((CallingConventions::kCalleeSaveCpuRegisters & (1 << saved_fp)) != 0);
// temp doesn't need to be preserved.
if (is_leaf_) {
__ movq(saved_sp, SPREG);
} else {
__ movq(saved_fp, FPREG);
// Make a space to put the return address.
__ pushq(compiler::Immediate(0));
// We need to create a dummy "exit frame". It will share the same pool
// pointer but have a null code object.
__ LoadObject(CODE_REG, Code::null_object());
__ set_constant_pool_allowed(false);
__ EnterDartFrame(0, PP);
}
// Reserve space for the arguments that go on the stack (if any), then align.
__ ReserveAlignedFrameSpace(marshaller_.RequiredStackSpaceInBytes());
if (is_leaf_) {
EmitParamMoves(compiler, FPREG, saved_fp);
} else {
EmitParamMoves(compiler, saved_fp, saved_sp);
}
if (compiler::Assembler::EmittingComments()) {
__ Comment(is_leaf_ ? "Leaf Call" : "Call");
}
if (is_leaf_) {
#if !defined(PRODUCT)
// Set the thread object's top_exit_frame_info and VMTag to enable the
// profiler to determine that thread is no longer executing Dart code.
__ movq(compiler::Address(
THR, compiler::target::Thread::top_exit_frame_info_offset()),
FPREG);
__ movq(compiler::Assembler::VMTagAddress(), target_address);
#endif
__ CallCFunction(target_address, /*restore_rsp=*/true);
#if !defined(PRODUCT)
__ movq(compiler::Assembler::VMTagAddress(),
compiler::Immediate(compiler::target::Thread::vm_tag_dart_id()));
__ movq(compiler::Address(
THR, compiler::target::Thread::top_exit_frame_info_offset()),
compiler::Immediate(0));
#endif
} else {
// We need to copy a dummy return address up into the dummy stack frame so
// the stack walker will know which safepoint to use. RIP points to the
// *next* instruction, so 'AddressRIPRelative' loads the address of the
// following 'movq'.
__ leaq(temp, compiler::Address::AddressRIPRelative(0));
compiler->EmitCallsiteMetadata(InstructionSource(), deopt_id(),
UntaggedPcDescriptors::Kind::kOther, locs(),
env());
__ movq(compiler::Address(FPREG, kSavedCallerPcSlotFromFp * kWordSize),
temp);
if (CanExecuteGeneratedCodeInSafepoint()) {
// Update information in the thread object and enter a safepoint.
__ movq(temp, compiler::Immediate(
compiler::target::Thread::exit_through_ffi()));
__ TransitionGeneratedToNative(target_address, FPREG, temp,
/*enter_safepoint=*/true);
__ CallCFunction(target_address, /*restore_rsp=*/true);
// Update information in the thread object and leave the safepoint.
__ TransitionNativeToGenerated(/*leave_safepoint=*/true);
} else {
// We cannot trust that this code will be executable within a safepoint.
// Therefore we delegate the responsibility of entering/exiting the
// safepoint to a stub which is in the VM isolate's heap, which will never
// lose execute permission.
__ movq(temp,
compiler::Address(
THR, compiler::target::Thread::
call_native_through_safepoint_entry_point_offset()));
// Calls RBX within a safepoint. RBX and R12 are clobbered.
__ movq(RBX, target_address);
__ call(temp);
}
}
// Pass the `saved_fp` reg. as a temp to clobber since we're done with it.
EmitReturnMoves(compiler, temp, saved_fp);
if (is_leaf_) {
// Restore the pre-aligned SP.
__ movq(SPREG, saved_sp);
} else {
// Although PP is a callee-saved register, it may have been moved by the GC.
__ LeaveDartFrame(compiler::kRestoreCallerPP);
// Restore the global object pool after returning from runtime (old space is
// moving, so the GOP could have been relocated).
if (FLAG_precompiled_mode) {
__ movq(PP, compiler::Address(THR, Thread::global_object_pool_offset()));
}
__ set_constant_pool_allowed(true);
// Instead of returning to the "fake" return address, we just pop it.
__ popq(temp);
}
}
// Keep in sync with NativeReturnInstr::EmitNativeCode.
void NativeEntryInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
__ Bind(compiler->GetJumpLabel(this));
// Create a dummy frame holding the pushed arguments. This simplifies
// NativeReturnInstr::EmitNativeCode.
__ EnterFrame(0);
#if defined(DART_TARGET_OS_FUCHSIA) && defined(USING_SHADOW_CALL_STACK)
#error Unimplemented
#endif
// Save the argument registers, in reverse order.
SaveArguments(compiler);
// Enter the entry frame. Push a dummy return address for consistency with
// EnterFrame on ARM(64). NativeParameterInstr expects this frame has size
// -exit_link_slot_from_entry_fp, verified below.
__ PushImmediate(compiler::Immediate(0));
__ EnterFrame(0);
// Save a space for the code object.
__ PushImmediate(compiler::Immediate(0));
// InvokeDartCodeStub saves the arguments descriptor here. We don't have one,
// but we need to follow the same frame layout for the stack walker.
__ PushImmediate(compiler::Immediate(0));
// Save ABI callee-saved registers.
__ PushRegisters(kCalleeSaveRegistersSet);
// Load the address of DLRT_GetThreadForNativeCallback without using Thread.
if (FLAG_precompiled_mode) {
compiler->LoadBSSEntry(BSS::Relocation::DRT_GetThreadForNativeCallback, RAX,
RCX);
} else if (!NativeCallbackTrampolines::Enabled()) {
// In JIT mode, we can just paste the address of the runtime entry into the
// generated code directly. This is not a problem since we don't save
// callbacks into JIT snapshots.
__ movq(RAX, compiler::Immediate(reinterpret_cast<intptr_t>(
DLRT_GetThreadForNativeCallback)));
}
// Create another frame to align the frame before continuing in "native" code.
// If we were called by a trampoline, it has already loaded the thread.
if (!NativeCallbackTrampolines::Enabled()) {
__ EnterFrame(0);
__ ReserveAlignedFrameSpace(0);
COMPILE_ASSERT(RAX != CallingConventions::kArg1Reg);
__ movq(CallingConventions::kArg1Reg, compiler::Immediate(callback_id_));
__ CallCFunction(RAX);
__ movq(THR, RAX);
__ LeaveFrame();
}
// Save the current VMTag on the stack.
__ movq(RAX, compiler::Assembler::VMTagAddress());
__ pushq(RAX);
// Save top resource.
__ pushq(
compiler::Address(THR, compiler::target::Thread::top_resource_offset()));
__ movq(
compiler::Address(THR, compiler::target::Thread::top_resource_offset()),
compiler::Immediate(0));
__ pushq(compiler::Address(
THR, compiler::target::Thread::exit_through_ffi_offset()));
// Save top exit frame info. Stack walker expects it to be here.
__ pushq(compiler::Address(
THR, compiler::target::Thread::top_exit_frame_info_offset()));
// In debug mode, verify that we've pushed the top exit frame info at the
// correct offset from FP.
__ EmitEntryFrameVerification();
// Either DLRT_GetThreadForNativeCallback or the callback trampoline (caller)
// will leave the safepoint for us.
__ TransitionNativeToGenerated(/*exit_safepoint=*/false);
// Load the code object.
__ movq(RAX, compiler::Address(
THR, compiler::target::Thread::callback_code_offset()));
__ LoadCompressed(
RAX, compiler::FieldAddress(
RAX, compiler::target::GrowableObjectArray::data_offset()));
__ LoadCompressed(
CODE_REG,
compiler::FieldAddress(
RAX, compiler::target::Array::data_offset() +
callback_id_ * compiler::target::kCompressedWordSize));
// Put the code object in the reserved slot.
__ movq(compiler::Address(FPREG,
kPcMarkerSlotFromFp * compiler::target::kWordSize),
CODE_REG);
if (FLAG_precompiled_mode) {
__ movq(PP,
compiler::Address(
THR, compiler::target::Thread::global_object_pool_offset()));
} else {
__ xorq(PP, PP); // GC-safe value into PP.
}
// Load a GC-safe value for arguments descriptor (unused but tagged).
__ xorq(ARGS_DESC_REG, ARGS_DESC_REG);
// Push a dummy return address which suggests that we are inside of
// InvokeDartCodeStub. This is how the stack walker detects an entry frame.
__ movq(RAX,
compiler::Address(
THR, compiler::target::Thread::invoke_dart_code_stub_offset()));
__ pushq(compiler::FieldAddress(
RAX, compiler::target::Code::entry_point_offset()));
// Continue with Dart frame setup.
FunctionEntryInstr::EmitNativeCode(compiler);
}
static bool CanBeImmediateIndex(Value* index, intptr_t cid) {
if (!index->definition()->IsConstant()) return false;
const Object& constant = index->definition()->AsConstant()->value();
if (!constant.IsSmi()) return false;
const Smi& smi_const = Smi::Cast(constant);
const intptr_t scale = Instance::ElementSizeFor(cid);
const intptr_t data_offset = Instance::DataOffsetFor(cid);
const int64_t disp = smi_const.AsInt64Value() * scale + data_offset;
return Utils::IsInt(32, disp);
}
LocationSummary* OneByteStringFromCharCodeInstr::MakeLocationSummary(
Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
// TODO(fschneider): Allow immediate operands for the char code.
return LocationSummary::Make(zone, kNumInputs, Location::RequiresRegister(),
LocationSummary::kNoCall);
}
void OneByteStringFromCharCodeInstr::EmitNativeCode(
FlowGraphCompiler* compiler) {
ASSERT(compiler->is_optimizing());
Register char_code = locs()->in(0).reg();
Register result = locs()->out(0).reg();
#if defined(DART_COMPRESSED_POINTERS)
// The upper half of a compressed Smi contains undefined bits, but no x64
// addressing mode will ignore these bits. Assume that the index is
// non-negative and clear the upper bits, which is shorter than
// sign-extension (movsxd). Note: we don't bother to ensure index is a
// writable input because any other instructions using it must also not
// rely on the upper bits.
__ orl(char_code, char_code);
#endif
__ movq(result,
compiler::Address(THR, Thread::predefined_symbols_address_offset()));
__ movq(result,
compiler::Address(result, char_code,
TIMES_HALF_WORD_SIZE, // Char code is a smi.
Symbols::kNullCharCodeSymbolOffset * kWordSize));
}
LocationSummary* StringToCharCodeInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
return LocationSummary::Make(zone, kNumInputs, Location::RequiresRegister(),
LocationSummary::kNoCall);
}
void StringToCharCodeInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
ASSERT(cid_ == kOneByteStringCid);
Register str = locs()->in(0).reg();
Register result = locs()->out(0).reg();
compiler::Label is_one, done;
__ LoadCompressedSmi(result,
compiler::FieldAddress(str, String::length_offset()));
__ cmpq(result, compiler::Immediate(Smi::RawValue(1)));
__ j(EQUAL, &is_one, compiler::Assembler::kNearJump);
__ movq(result, compiler::Immediate(Smi::RawValue(-1)));
__ jmp(&done);
__ Bind(&is_one);
__ movzxb(result, compiler::FieldAddress(str, OneByteString::data_offset()));
__ SmiTag(result);
__ Bind(&done);
}
LocationSummary* Utf8ScanInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 5;
const intptr_t kNumTemps = 1;
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
summary->set_in(0, Location::Any()); // decoder
summary->set_in(1, Location::WritableRegister()); // bytes
summary->set_in(2, Location::WritableRegister()); // start
summary->set_in(3, Location::WritableRegister()); // end
summary->set_in(4, Location::RequiresRegister()); // table
summary->set_temp(0, Location::RequiresRegister());
summary->set_out(0, Location::RequiresRegister());
return summary;
}
void Utf8ScanInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
const Register bytes_reg = locs()->in(1).reg();
const Register start_reg = locs()->in(2).reg();
const Register end_reg = locs()->in(3).reg();
const Register table_reg = locs()->in(4).reg();
const Register size_reg = locs()->out(0).reg();
const Register bytes_ptr_reg = start_reg;
const Register bytes_end_reg = end_reg;
const Register bytes_end_minus_16_reg = bytes_reg;
const Register flags_reg = locs()->temp(0).reg();
const Register temp_reg = TMP;
const XmmRegister vector_reg = FpuTMP;
static const intptr_t kSizeMask = 0x03;
static const intptr_t kFlagsMask = 0x3C;
compiler::Label scan_ascii, ascii_loop, ascii_loop_in, nonascii_loop;
compiler::Label rest, rest_loop, rest_loop_in, done;
// Address of input bytes.
__ movq(bytes_reg,
compiler::FieldAddress(bytes_reg,
compiler::target::PointerBase::data_offset()));
// Pointers to start, end and end-16.
__ leaq(bytes_ptr_reg, compiler::Address(bytes_reg, start_reg, TIMES_1, 0));
__ leaq(bytes_end_reg, compiler::Address(bytes_reg, end_reg, TIMES_1, 0));
__ leaq(bytes_end_minus_16_reg, compiler::Address(bytes_end_reg, -16));
// Initialize size and flags.
__ xorq(size_reg, size_reg);
__ xorq(flags_reg, flags_reg);
__ jmp(&scan_ascii, compiler::Assembler::kNearJump);
// Loop scanning through ASCII bytes one 16-byte vector at a time.
// While scanning, the size register contains the size as it was at the start
// of the current block of ASCII bytes, minus the address of the start of the
// block. After the block, the end address of the block is added to update the
// size to include the bytes in the block.
__ Bind(&ascii_loop);
__ addq(bytes_ptr_reg, compiler::Immediate(16));
__ Bind(&ascii_loop_in);
// Exit vectorized loop when there are less than 16 bytes left.
__ cmpq(bytes_ptr_reg, bytes_end_minus_16_reg);
__ j(UNSIGNED_GREATER, &rest, compiler::Assembler::kNearJump);
// Find next non-ASCII byte within the next 16 bytes.
// Note: In principle, we should use MOVDQU here, since the loaded value is
// used as input to an integer instruction. In practice, according to Agner
// Fog, there is no penalty for using the wrong kind of load.
__ movups(vector_reg, compiler::Address(bytes_ptr_reg, 0));
__ pmovmskb(temp_reg, vector_reg);
__ bsfq(temp_reg, temp_reg);
__ j(EQUAL, &ascii_loop, compiler::Assembler::kNearJump);
// Point to non-ASCII byte and update size.
__ addq(bytes_ptr_reg, temp_reg);
__ addq(size_reg, bytes_ptr_reg);
// Read first non-ASCII byte.
__ movzxb(temp_reg, compiler::Address(bytes_ptr_reg, 0));
// Loop over block of non-ASCII bytes.
__ Bind(&nonascii_loop);
__ addq(bytes_ptr_reg, compiler::Immediate(1));
// Update size and flags based on byte value.
__ movzxb(temp_reg, compiler::FieldAddress(
table_reg, temp_reg, TIMES_1,
compiler::target::OneByteString::data_offset()));
__ orq(flags_reg, temp_reg);
__ andq(temp_reg, compiler::Immediate(kSizeMask));
__ addq(size_reg, temp_reg);
// Stop if end is reached.
__ cmpq(bytes_ptr_reg, bytes_end_reg);
__ j(UNSIGNED_GREATER_EQUAL, &done, compiler::Assembler::kNearJump);
// Go to ASCII scan if next byte is ASCII, otherwise loop.
__ movzxb(temp_reg, compiler::Address(bytes_ptr_reg, 0));
__ testq(temp_reg, compiler::Immediate(0x80));
__ j(NOT_EQUAL, &nonascii_loop, compiler::Assembler::kNearJump);
// Enter the ASCII scanning loop.
__ Bind(&scan_ascii);
__ subq(size_reg, bytes_ptr_reg);
__ jmp(&ascii_loop_in);
// Less than 16 bytes left. Process the remaining bytes individually.
__ Bind(&rest);
// Update size after ASCII scanning loop.
__ addq(size_reg, bytes_ptr_reg);
__ jmp(&rest_loop_in, compiler::Assembler::kNearJump);
__ Bind(&rest_loop);
// Read byte and increment pointer.
__ movzxb(temp_reg, compiler::Address(bytes_ptr_reg, 0));
__ addq(bytes_ptr_reg, compiler::Immediate(1));
// Update size and flags based on byte value.
__ movzxb(temp_reg, compiler::FieldAddress(
table_reg, temp_reg, TIMES_1,
compiler::target::OneByteString::data_offset()));
__ orq(flags_reg, temp_reg);
__ andq(temp_reg, compiler::Immediate(kSizeMask));
__ addq(size_reg, temp_reg);
// Stop if end is reached.
__ Bind(&rest_loop_in);
__ cmpq(bytes_ptr_reg, bytes_end_reg);
__ j(UNSIGNED_LESS, &rest_loop, compiler::Assembler::kNearJump);
__ Bind(&done);
// Write flags to field.
__ andq(flags_reg, compiler::Immediate(kFlagsMask));
if (!IsScanFlagsUnboxed()) {
__ SmiTag(flags_reg);
}
Register decoder_reg;
const Location decoder_location = locs()->in(0);
if (decoder_location.IsStackSlot()) {
__ movq(temp_reg, LocationToStackSlotAddress(decoder_location));
decoder_reg = temp_reg;
} else {
decoder_reg = decoder_location.reg();
}
const auto scan_flags_field_offset = scan_flags_field_.offset_in_bytes();
if (scan_flags_field_.is_compressed() && !IsScanFlagsUnboxed()) {
__ OBJ(or)(compiler::FieldAddress(decoder_reg, scan_flags_field_offset),
flags_reg);
} else {
__ orq(compiler::FieldAddress(decoder_reg, scan_flags_field_offset),
flags_reg);
}
}
LocationSummary* LoadUntaggedInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
return LocationSummary::Make(zone, kNumInputs, Location::RequiresRegister(),
LocationSummary::kNoCall);
}
void LoadUntaggedInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
Register obj = locs()->in(0).reg();
Register result = locs()->out(0).reg();
if (object()->definition()->representation() == kUntagged) {
__ movq(result, compiler::Address(obj, offset()));
} else {
ASSERT(object()->definition()->representation() == kTagged);
__ movq(result, compiler::FieldAddress(obj, offset()));
}
}
LocationSummary* LoadIndexedInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 2;
const intptr_t kNumTemps = 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::RequiresRegister());
// For tagged index with index_scale=1 as well as untagged index with
// index_scale=16 we need a writable register due to addressing mode
// restrictions on X64.
const bool need_writable_index_register =
(index_scale() == 1 && !index_unboxed_) ||
(index_scale() == 16 && index_unboxed_);
locs->set_in(
1, CanBeImmediateIndex(index(), class_id())
? Location::Constant(index()->definition()->AsConstant())
: (need_writable_index_register ? Location::WritableRegister()
: Location::RequiresRegister()));
if ((representation() == kUnboxedDouble) ||
(representation() == kUnboxedFloat32x4) ||
(representation() == kUnboxedInt32x4) ||
(representation() == kUnboxedFloat64x2)) {
locs->set_out(0, Location::RequiresFpuRegister());
} else {
locs->set_out(0, Location::RequiresRegister());
}
return locs;
}
void LoadIndexedInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// The array register points to the backing store for external arrays.
const Register array = locs()->in(0).reg();
const Location index = locs()->in(1);
intptr_t index_scale = index_scale_;
if (index.IsRegister()) {
if (index_scale == 1 && !index_unboxed_) {
__ SmiUntag(index.reg());
} else if (index_scale == 16 && index_unboxed_) {
// X64 does not support addressing mode using TIMES_16.
__ SmiTag(index.reg());
index_scale >>= 1;
} else if (!index_unboxed_) {
#if defined(DART_COMPRESSED_POINTERS)
// The upper half of a compressed Smi contains undefined bits, but no x64
// addressing mode will ignore these bits. Assume that the index is
// non-negative and clear the upper bits, which is shorter than
// sign-extension (movsxd). Note: we don't bother to ensure index is a
// writable input because any other instructions using it must also not
// rely on the upper bits.
__ orl(index.reg(), index.reg());
#endif
}
} else {
ASSERT(index.IsConstant());
}
compiler::Address element_address =
index.IsRegister() ? compiler::Assembler::ElementAddressForRegIndex(
IsExternal(), class_id(), index_scale,
index_unboxed_, array, index.reg())
: compiler::Assembler::ElementAddressForIntIndex(
IsExternal(), class_id(), index_scale, array,
Smi::Cast(index.constant()).Value());
if (representation() == kUnboxedDouble ||
representation() == kUnboxedFloat32x4 ||
representation() == kUnboxedInt32x4 ||
representation() == kUnboxedFloat64x2) {
XmmRegister result = locs()->out(0).fpu_reg();
if (class_id() == kTypedDataFloat32ArrayCid) {
// Load single precision float.
__ movss(result, element_address);
} else if (class_id() == kTypedDataFloat64ArrayCid) {
__ movsd(result, element_address);
} else {
ASSERT((class_id() == kTypedDataInt32x4ArrayCid) ||
(class_id() == kTypedDataFloat32x4ArrayCid) ||
(class_id() == kTypedDataFloat64x2ArrayCid));
__ movups(result, element_address);
}
return;
}
Register result = locs()->out(0).reg();
switch (class_id()) {
case kTypedDataInt32ArrayCid:
ASSERT(representation() == kUnboxedInt32);
__ movsxd(result, element_address);
break;
case kTypedDataUint32ArrayCid:
ASSERT(representation() == kUnboxedUint32);
__ movl(result, element_address);
break;
case kTypedDataInt64ArrayCid:
case kTypedDataUint64ArrayCid:
ASSERT(representation() == kUnboxedInt64);
__ movq(result, element_address);
break;
case kTypedDataInt8ArrayCid:
ASSERT(representation() == kUnboxedIntPtr);
__ movsxb(result, element_address);
break;
case kTypedDataUint8ArrayCid:
case kTypedDataUint8ClampedArrayCid:
case kExternalTypedDataUint8ArrayCid:
case kExternalTypedDataUint8ClampedArrayCid:
case kOneByteStringCid:
case kExternalOneByteStringCid:
ASSERT(representation() == kUnboxedIntPtr);
__ movzxb(result, element_address);
break;
case kTypedDataInt16ArrayCid:
ASSERT(representation() == kUnboxedIntPtr);
__ movsxw(result, element_address);
break;
case kTypedDataUint16ArrayCid:
case kTwoByteStringCid:
case kExternalTwoByteStringCid:
ASSERT(representation() == kUnboxedIntPtr);
__ movzxw(result, element_address);
break;
default:
ASSERT(representation() == kTagged);
ASSERT((class_id() == kArrayCid) || (class_id() == kImmutableArrayCid) ||
(class_id() == kTypeArgumentsCid));
__ LoadCompressed(result, element_address);
break;
}
}
LocationSummary* LoadCodeUnitsInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 2;
const intptr_t kNumTemps = 0;
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
summary->set_in(0, Location::RequiresRegister());
// The smi index is either untagged (element size == 1), or it is left smi
// tagged (for all element sizes > 1).
summary->set_in(1, index_scale() == 1 ? Location::WritableRegister()
: Location::RequiresRegister());
summary->set_out(0, Location::RequiresRegister());
return summary;
}
void LoadCodeUnitsInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// The string register points to the backing store for external strings.
const Register str = locs()->in(0).reg();
const Location index = locs()->in(1);
compiler::Address element_address =
compiler::Assembler::ElementAddressForRegIndex(
IsExternal(), class_id(), index_scale(), /*index_unboxed=*/false, str,
index.reg());
if ((index_scale() == 1)) {
__ SmiUntag(index.reg());
} else {
#if defined(DART_COMPRESSED_POINTERS)
// The upper half of a compressed Smi contains undefined bits, but no x64
// addressing mode will ignore these bits. Assume that the index is
// non-negative and clear the upper bits, which is shorter than
// sign-extension (movsxd). Note: we don't bother to ensure index is a
// writable input because any other instructions using it must also not
// rely on the upper bits.
__ orl(index.reg(), index.reg());
#endif
}
Register result = locs()->out(0).reg();
switch (class_id()) {
case kOneByteStringCid:
case kExternalOneByteStringCid:
switch (element_count()) {
case 1:
__ movzxb(result, element_address);
break;
case 2:
__ movzxw(result, element_address);
break;
case 4:
__ movl(result, element_address);
break;
default:
UNREACHABLE();
}
ASSERT(can_pack_into_smi());
__ SmiTag(result);
break;
case kTwoByteStringCid:
case kExternalTwoByteStringCid:
switch (element_count()) {
case 1:
__ movzxw(result, element_address);
break;
case 2:
__ movl(result, element_address);
break;
default:
UNREACHABLE();
}
ASSERT(can_pack_into_smi());
__ SmiTag(result);
break;
default:
UNREACHABLE();
break;
}
}
LocationSummary* StoreIndexedInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 3;
const intptr_t kNumTemps =
class_id() == kArrayCid && ShouldEmitStoreBarrier() ? 1 : 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::RequiresRegister());
// For tagged index with index_scale=1 as well as untagged index with
// index_scale=16 we need a writable register due to addressing mode
// restrictions on X64.
const bool need_writable_index_register =
(index_scale() == 1 && !index_unboxed_) ||
(index_scale() == 16 && index_unboxed_);
locs->set_in(
1, CanBeImmediateIndex(index(), class_id())
? Location::Constant(index()->definition()->AsConstant())
: (need_writable_index_register ? Location::WritableRegister()
: Location::RequiresRegister()));
switch (class_id()) {
case kArrayCid:
locs->set_in(2, ShouldEmitStoreBarrier()
? Location::RegisterLocation(kWriteBarrierValueReg)
: LocationRegisterOrConstant(value()));
if (ShouldEmitStoreBarrier()) {
locs->set_in(0, Location::RegisterLocation(kWriteBarrierObjectReg));
locs->set_temp(0, Location::RegisterLocation(kWriteBarrierSlotReg));
}
break;
case kExternalTypedDataUint8ArrayCid:
case kExternalTypedDataUint8ClampedArrayCid:
case kTypedDataInt8ArrayCid:
case kTypedDataUint8ArrayCid:
case kTypedDataUint8ClampedArrayCid:
case kOneByteStringCid:
case kTwoByteStringCid:
// TODO(fschneider): Add location constraint for byte registers (RAX,
// RBX, RCX, RDX) instead of using a fixed register.
locs->set_in(2, LocationFixedRegisterOrSmiConstant(value(), RAX));
break;
case kTypedDataInt16ArrayCid:
case kTypedDataUint16ArrayCid:
// Writable register because the value must be untagged before storing.
locs->set_in(2, Location::WritableRegister());
break;
case kTypedDataInt32ArrayCid:
case kTypedDataUint32ArrayCid:
case kTypedDataInt64ArrayCid:
case kTypedDataUint64ArrayCid:
locs->set_in(2, Location::RequiresRegister());
break;
case kTypedDataFloat32ArrayCid:
case kTypedDataFloat64ArrayCid:
// TODO(srdjan): Support Float64 constants.
locs->set_in(2, Location::RequiresFpuRegister());
break;
case kTypedDataInt32x4ArrayCid:
case kTypedDataFloat64x2ArrayCid:
case kTypedDataFloat32x4ArrayCid:
locs->set_in(2, Location::RequiresFpuRegister());
break;
default:
UNREACHABLE();
return NULL;
}
return locs;
}
void StoreIndexedInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// The array register points to the backing store for external arrays.
const Register array = locs()->in(0).reg();
const Location index = locs()->in(1);
intptr_t index_scale = index_scale_;
if (index.IsRegister()) {
if (index_scale == 1 && !index_unboxed_) {
__ SmiUntag(index.reg());
} else if (index_scale == 16 && index_unboxed_) {
// X64 does not support addressing mode using TIMES_16.
__ SmiTag(index.reg());
index_scale >>= 1;
} else if (!index_unboxed_) {
#if defined(DART_COMPRESSED_POINTERS)
// The upper half of a compressed Smi contains undefined bits, but no x64
// addressing mode will ignore these bits. Assume that the index is
// non-negative and clear the upper bits, which is shorter than
// sign-extension (movsxd). Note: we don't bother to ensure index is a
// writable input because any other instructions using it must also not
// rely on the upper bits.
__ orl(index.reg(), index.reg());
#endif
}
} else {
ASSERT(index.IsConstant());
}
compiler::Address element_address =
index.IsRegister() ? compiler::Assembler::ElementAddressForRegIndex(
IsExternal(), class_id(), index_scale,
index_unboxed_, array, index.reg())
: compiler::Assembler::ElementAddressForIntIndex(
IsExternal(), class_id(), index_scale, array,
Smi::Cast(index.constant()).Value());
switch (class_id()) {
case kArrayCid:
if (ShouldEmitStoreBarrier()) {
Register value = locs()->in(2).reg();
Register slot = locs()->temp(0).reg();
__ leaq(slot, element_address);
__ StoreCompressedIntoArray(array, slot, value, CanValueBeSmi());
} else if (locs()->in(2).IsConstant()) {
const Object& constant = locs()->in(2).constant();
__ StoreCompressedIntoObjectNoBarrier(array, element_address, constant);
} else {
Register value = locs()->in(2).reg();
__ StoreCompressedIntoObjectNoBarrier(array, element_address, value);
}
break;
case kOneByteStringCid:
case kTypedDataInt8ArrayCid:
case kTypedDataUint8ArrayCid:
case kExternalTypedDataUint8ArrayCid:
ASSERT(RequiredInputRepresentation(2) == kUnboxedIntPtr);
if (locs()->in(2).IsConstant()) {
const Smi& constant = Smi::Cast(locs()->in(2).constant());
__ movb(element_address,
compiler::Immediate(static_cast<int8_t>(constant.Value())));
} else {
ASSERT(locs()->in(2).reg() == RAX);
__ movb(element_address, RAX);
}
break;
case kTypedDataUint8ClampedArrayCid:
case kExternalTypedDataUint8ClampedArrayCid: {
ASSERT(RequiredInputRepresentation(2) == kUnboxedIntPtr);
if (locs()->in(2).IsConstant()) {
const Smi& constant = Smi::Cast(locs()->in(2).constant());
intptr_t value = constant.Value();
// Clamp to 0x0 or 0xFF respectively.
if (value > 0xFF) {
value = 0xFF;
} else if (value < 0) {
value = 0;
}
__ movb(element_address,
compiler::Immediate(static_cast<int8_t>(value)));
} else {
ASSERT(locs()->in(2).reg() == RAX);
compiler::Label store_value, store_0xff;
__ CompareImmediate(RAX, compiler::Immediate(0xFF));
__ j(BELOW_EQUAL, &store_value, compiler::Assembler::kNearJump);
// Clamp to 0x0 or 0xFF respectively.
__ j(GREATER, &store_0xff);
__ xorq(RAX, RAX);
__ jmp(&store_value, compiler::Assembler::kNearJump);
__ Bind(&store_0xff);
__ LoadImmediate(RAX, compiler::Immediate(0xFF));
__ Bind(&store_value);
__ movb(element_address, RAX);
}
break;
}
case kTwoByteStringCid:
case kTypedDataInt16ArrayCid:
case kTypedDataUint16ArrayCid: {
ASSERT(RequiredInputRepresentation(2) == kUnboxedIntPtr);
Register value = locs()->in(2).reg();
__ movw(element_address, value);
break;
}
case kTypedDataInt32ArrayCid:
case kTypedDataUint32ArrayCid: {
Register value = locs()->in(2).reg();
__ movl(element_address, value);
break;
}
case kTypedDataInt64ArrayCid:
case kTypedDataUint64ArrayCid: {
Register value = locs()->in(2).reg();
__ movq(element_address, value);
break;
}
case kTypedDataFloat32ArrayCid:
__ movss(element_address, locs()->in(2).fpu_reg());
break;
case kTypedDataFloat64ArrayCid:
__ movsd(element_address, locs()->in(2).fpu_reg());
break;
case kTypedDataInt32x4ArrayCid:
case kTypedDataFloat64x2ArrayCid:
case kTypedDataFloat32x4ArrayCid:
__ movups(element_address, locs()->in(2).fpu_reg());
break;
default:
UNREACHABLE();
}
}
LocationSummary* GuardFieldClassInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
const intptr_t value_cid = value()->Type()->ToCid();
const intptr_t field_cid = field().guarded_cid();
const bool emit_full_guard = !opt || (field_cid == kIllegalCid);
const bool needs_value_cid_temp_reg =
(value_cid == kDynamicCid) && (emit_full_guard || (field_cid != kSmiCid));
const bool needs_field_temp_reg = emit_full_guard;
intptr_t num_temps = 0;
if (needs_value_cid_temp_reg) {
num_temps++;
}
if (needs_field_temp_reg) {
num_temps++;
}
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, num_temps, LocationSummary::kNoCall);
summary->set_in(0, Location::RequiresRegister());
for (intptr_t i = 0; i < num_temps; i++) {
summary->set_temp(i, Location::RequiresRegister());
}
return summary;
}
void GuardFieldClassInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
ASSERT(compiler::target::UntaggedObject::kClassIdTagSize == 16);
ASSERT(sizeof(UntaggedField::guarded_cid_) == 2);
ASSERT(sizeof(UntaggedField::is_nullable_) == 2);
const intptr_t value_cid = value()->Type()->ToCid();
const intptr_t field_cid = field().guarded_cid();
const intptr_t nullability = field().is_nullable() ? kNullCid : kIllegalCid;
if (field_cid == kDynamicCid) {
return; // Nothing to emit.
}
const bool emit_full_guard =
!compiler->is_optimizing() || (field_cid == kIllegalCid);
const bool needs_value_cid_temp_reg =
(value_cid == kDynamicCid) && (emit_full_guard || (field_cid != kSmiCid));
const bool needs_field_temp_reg = emit_full_guard;
const Register value_reg = locs()->in(0).reg();
const Register value_cid_reg =
needs_value_cid_temp_reg ? locs()->temp(0).reg() : kNoRegister;
const Register field_reg = needs_field_temp_reg
? locs()->temp(locs()->temp_count() - 1).reg()
: kNoRegister;
compiler::Label ok, fail_label;
compiler::Label* deopt = NULL;
if (compiler->is_optimizing()) {
deopt = compiler->AddDeoptStub(deopt_id(), ICData::kDeoptGuardField);
}
compiler::Label* fail = (deopt != NULL) ? deopt : &fail_label;
if (emit_full_guard) {
__ LoadObject(field_reg, Field::ZoneHandle(field().Original()));
compiler::FieldAddress field_cid_operand(field_reg,
Field::guarded_cid_offset());
compiler::FieldAddress field_nullability_operand(
field_reg, Field::is_nullable_offset());
if (value_cid == kDynamicCid) {
LoadValueCid(compiler, value_cid_reg, value_reg);
__ cmpw(value_cid_reg, field_cid_operand);
__ j(EQUAL, &ok);
__ cmpw(value_cid_reg, field_nullability_operand);
} else if (value_cid == kNullCid) {
__ cmpw(field_nullability_operand, compiler::Immediate(value_cid));
} else {
__ cmpw(field_cid_operand, compiler::Immediate(value_cid));
}
__ j(EQUAL, &ok);
// Check if the tracked state of the guarded field can be initialized
// inline. If the field needs length check or requires type arguments and
// class hierarchy processing for exactness tracking then we fall through
// into runtime which is responsible for computing offset of the length
// field based on the class id.
const bool is_complicated_field =
field().needs_length_check() ||
field().static_type_exactness_state().IsUninitialized();
if (!is_complicated_field) {
// Uninitialized field can be handled inline. Check if the
// field is still unitialized.
__ cmpw(field_cid_operand, compiler::Immediate(kIllegalCid));
__ j(NOT_EQUAL, fail);
if (value_cid == kDynamicCid) {
__ movw(field_cid_operand, value_cid_reg);
__ movw(field_nullability_operand, value_cid_reg);
} else {
ASSERT(field_reg != kNoRegister);
__ movw(field_cid_operand, compiler::Immediate(value_cid));
__ movw(field_nullability_operand, compiler::Immediate(value_cid));
}
__ jmp(&ok);
}
if (deopt == NULL) {
__ Bind(fail);
__ cmpw(compiler::FieldAddress(field_reg, Field::guarded_cid_offset()),
compiler::Immediate(kDynamicCid));
__ j(EQUAL, &ok);
__ pushq(field_reg);
__ pushq(value_reg);
ASSERT(!compiler->is_optimizing()); // No deopt info needed.
__ CallRuntime(kUpdateFieldCidRuntimeEntry, 2);
__ Drop(2); // Drop the field and the value.
} else {
__ jmp(fail);
}
} else {
ASSERT(compiler->is_optimizing());
ASSERT(deopt != NULL);
// Field guard class has been initialized and is known.
if (value_cid == kDynamicCid) {
// Value's class id is not known.
__ testq(value_reg, compiler::Immediate(kSmiTagMask));
if (field_cid != kSmiCid) {
__ j(ZERO, fail);
__ LoadClassId(value_cid_reg, value_reg);
__ CompareImmediate(value_cid_reg, compiler::Immediate(field_cid));
}
if (field().is_nullable() && (field_cid != kNullCid)) {
__ j(EQUAL, &ok);
__ CompareObject(value_reg, Object::null_object());
}
__ j(NOT_EQUAL, fail);
} else if (value_cid == field_cid) {
// This would normaly be caught by Canonicalize, but RemoveRedefinitions
// may sometimes produce the situation after the last Canonicalize pass.
} else {
// Both value's and field's class id is known.
ASSERT(value_cid != nullability);
__ jmp(fail);
}
}
__ Bind(&ok);
}
LocationSummary* GuardFieldLengthInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
if (!opt || (field().guarded_list_length() == Field::kUnknownFixedLength)) {
const intptr_t kNumTemps = 3;
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
summary->set_in(0, Location::RequiresRegister());
// We need temporaries for field object, length offset and expected length.
summary->set_temp(0, Location::RequiresRegister());
summary->set_temp(1, Location::RequiresRegister());
summary->set_temp(2, Location::RequiresRegister());
return summary;
} else {
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, 0, LocationSummary::kNoCall);
summary->set_in(0, Location::RequiresRegister());
return summary;
}
UNREACHABLE();
}
void GuardFieldLengthInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
if (field().guarded_list_length() == Field::kNoFixedLength) {
return; // Nothing to emit.
}
compiler::Label* deopt =
compiler->is_optimizing()
? compiler->AddDeoptStub(deopt_id(), ICData::kDeoptGuardField)
: NULL;
const Register value_reg = locs()->in(0).reg();
if (!compiler->is_optimizing() ||
(field().guarded_list_length() == Field::kUnknownFixedLength)) {
const Register field_reg = locs()->temp(0).reg();
const Register offset_reg = locs()->temp(1).reg();
const Register length_reg = locs()->temp(2).reg();
compiler::Label ok;
__ LoadObject(field_reg, Field::ZoneHandle(field().Original()));
__ movsxb(
offset_reg,
compiler::FieldAddress(
field_reg, Field::guarded_list_length_in_object_offset_offset()));
__ LoadCompressedSmi(
length_reg,
compiler::FieldAddress(field_reg, Field::guarded_list_length_offset()));
__ cmpq(offset_reg, compiler::Immediate(0));
__ j(NEGATIVE, &ok);
// Load the length from the value. GuardFieldClass already verified that
// value's class matches guarded class id of the field.
// offset_reg contains offset already corrected by -kHeapObjectTag that is
// why we use Address instead of FieldAddress.
__ OBJ(cmp)(length_reg,
compiler::Address(value_reg, offset_reg, TIMES_1, 0));
if (deopt == NULL) {
__ j(EQUAL, &ok);
__ pushq(field_reg);
__ pushq(value_reg);
ASSERT(!compiler->is_optimizing()); // No deopt info needed.
__ CallRuntime(kUpdateFieldCidRuntimeEntry, 2);
__ Drop(2); // Drop the field and the value.
} else {
__ j(NOT_EQUAL, deopt);
}
__ Bind(&ok);
} else {
ASSERT(compiler->is_optimizing());
ASSERT(field().guarded_list_length() >= 0);
ASSERT(field().guarded_list_length_in_object_offset() !=
Field::kUnknownLengthOffset);
__ CompareImmediate(
compiler::FieldAddress(value_reg,
field().guarded_list_length_in_object_offset()),
compiler::Immediate(Smi::RawValue(field().guarded_list_length())));
__ j(NOT_EQUAL, deopt);
}
}
LocationSummary* GuardFieldTypeInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
const intptr_t kNumTemps = 1;
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
summary->set_in(0, Location::RequiresRegister());
summary->set_temp(0, Location::RequiresRegister());
return summary;
}
void GuardFieldTypeInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
// Should never emit GuardFieldType for fields that are marked as NotTracking.
ASSERT(field().static_type_exactness_state().IsTracking());
if (!field().static_type_exactness_state().NeedsFieldGuard()) {
// Nothing to do: we only need to perform checks for trivially invariant
// fields. If optimizing Canonicalize pass should have removed
// this instruction.
return;
}
compiler::Label* deopt =
compiler->is_optimizing()
? compiler->AddDeoptStub(deopt_id(), ICData::kDeoptGuardField)
: NULL;
compiler::Label ok;
const Register value_reg = locs()->in(0).reg();
const Register temp = locs()->temp(0).reg();
// Skip null values for nullable fields.
if (!compiler->is_optimizing() || field().is_nullable()) {
__ CompareObject(value_reg, Object::Handle());
__ j(EQUAL, &ok);
}
// Get the state.
const Field& original =
Field::ZoneHandle(compiler->zone(), field().Original());
__ LoadObject(temp, original);
__ movsxb(temp, compiler::FieldAddress(
temp, Field::static_type_exactness_state_offset()));
if (!compiler->is_optimizing()) {
// Check if field requires checking (it is in unitialized or trivially
// exact state).
__ cmpq(temp,
compiler::Immediate(StaticTypeExactnessState::kUninitialized));
__ j(LESS, &ok);
}
compiler::Label call_runtime;
if (field().static_type_exactness_state().IsUninitialized()) {
// Can't initialize the field state inline in optimized code.
__ cmpq(temp,
compiler::Immediate(StaticTypeExactnessState::kUninitialized));
__ j(EQUAL, compiler->is_optimizing() ? deopt : &call_runtime);
}
// At this point temp is known to be type arguments offset in words.
__ movq(temp, compiler::FieldAddress(value_reg, temp,
TIMES_COMPRESSED_WORD_SIZE, 0));
__ CompareObject(temp, TypeArguments::ZoneHandle(
compiler->zone(),
AbstractType::Handle(field().type()).arguments()));
if (deopt != nullptr) {
__ j(NOT_EQUAL, deopt);
} else {
__ j(EQUAL, &ok);
__ Bind(&call_runtime);
__ PushObject(original);
__ pushq(value_reg);
ASSERT(!compiler->is_optimizing()); // No deopt info needed.
__ CallRuntime(kUpdateFieldCidRuntimeEntry, 2);
__ Drop(2);
}
__ Bind(&ok);
}
LocationSummary* StoreInstanceFieldInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 2;
const intptr_t kNumTemps = (IsUnboxedDartFieldStore() && opt)
? (FLAG_precompiled_mode ? 0 : 2)
: (IsPotentialUnboxedDartFieldStore() ? 3 : 0);
LocationSummary* summary = new (zone) LocationSummary(
zone, kNumInputs, kNumTemps,
(!FLAG_precompiled_mode &&
((IsUnboxedDartFieldStore() && opt && is_initialization()) ||
IsPotentialUnboxedDartFieldStore()))
? LocationSummary::kCallOnSlowPath
: LocationSummary::kNoCall);
summary->set_in(kInstancePos, Location::RequiresRegister());
if (slot().representation() != kTagged) {
ASSERT(RepresentationUtils::IsUnboxedInteger(slot().representation()));
ASSERT(RepresentationUtils::ValueSize(slot().representation()) <=
compiler::target::kWordSize);
summary->set_in(kValuePos, Location::RequiresRegister());
} else if (IsUnboxedDartFieldStore() && opt) {
summary->set_in(kValuePos, Location::RequiresFpuRegister());
if (!FLAG_precompiled_mode) {
summary->set_temp(0, Location::RequiresRegister());
summary->set_temp(1, Location::RequiresRegister());
}
} else if (IsPotentialUnboxedDartFieldStore()) {
summary->set_in(kValuePos, ShouldEmitStoreBarrier()
? Location::WritableRegister()
: Location::RequiresRegister());
summary->set_temp(0, Location::RequiresRegister());
summary->set_temp(1, Location::RequiresRegister());
summary->set_temp(2, opt ? Location::RequiresFpuRegister()
: Location::FpuRegisterLocation(XMM1));
} else {
summary->set_in(kValuePos,
ShouldEmitStoreBarrier()
? Location::RegisterLocation(kWriteBarrierValueReg)
: LocationRegisterOrConstant(value()));
}
return summary;
}
static void EnsureMutableBox(FlowGraphCompiler* compiler,
StoreInstanceFieldInstr* instruction,
Register box_reg,
const Class& cls,
Register instance_reg,
intptr_t offset,
Register temp) {
compiler::Label done;
__ LoadCompressed(box_reg, compiler::FieldAddress(instance_reg, offset));
__ CompareObject(box_reg, Object::null_object());
__ j(NOT_EQUAL, &done);
BoxAllocationSlowPath::Allocate(compiler, instruction, cls, box_reg, temp);
__ movq(temp, box_reg);
__ StoreCompressedIntoObject(instance_reg,
compiler::FieldAddress(instance_reg, offset),
temp, compiler::Assembler::kValueIsNotSmi);
__ Bind(&done);
}
void StoreInstanceFieldInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
ASSERT(compiler::target::UntaggedObject::kClassIdTagSize == 16);
ASSERT(sizeof(UntaggedField::guarded_cid_) == 2);
ASSERT(sizeof(UntaggedField::is_nullable_) == 2);
compiler::Label skip_store;
const Register instance_reg = locs()->in(kInstancePos).reg();
const intptr_t offset_in_bytes = OffsetInBytes();
ASSERT(offset_in_bytes > 0); // Field is finalized and points after header.
if (slot().representation() != kTagged) {
ASSERT(memory_order_ != compiler::AssemblerBase::kRelease);
ASSERT(RepresentationUtils::IsUnboxedInteger(slot().representation()));
const Register value = locs()->in(kValuePos).reg();
__ Comment("NativeUnboxedStoreInstanceFieldInstr");
__ StoreFieldToOffset(
value, instance_reg, offset_in_bytes,
RepresentationUtils::OperandSize(slot().representation()));
return;
}
if (IsUnboxedDartFieldStore() && compiler->is_optimizing()) {
ASSERT(memory_order_ != compiler::AssemblerBase::kRelease);
XmmRegister value = locs()->in(kValuePos).fpu_reg();
const intptr_t cid = slot().field().UnboxedFieldCid();
// Real unboxed field
if (FLAG_precompiled_mode) {
switch (cid) {
case kDoubleCid:
__ Comment("UnboxedDoubleStoreInstanceFieldInstr");
__ movsd(compiler::FieldAddress(instance_reg, offset_in_bytes),
value);
return;
case kFloat32x4Cid:
__ Comment("UnboxedFloat32x4StoreInstanceFieldInstr");
__ movups(compiler::FieldAddress(instance_reg, offset_in_bytes),
value);
return;
case kFloat64x2Cid:
__ Comment("UnboxedFloat64x2StoreInstanceFieldInstr");
__ movups(compiler::FieldAddress(instance_reg, offset_in_bytes),
value);
return;
default:
UNREACHABLE();
}
}
Register temp = locs()->temp(0).reg();
Register temp2 = locs()->temp(1).reg();
if (is_initialization()) {
const Class* cls = NULL;
switch (cid) {
case kDoubleCid:
cls = &compiler->double_class();
break;
case kFloat32x4Cid:
cls = &compiler->float32x4_class();
break;
case kFloat64x2Cid:
cls = &compiler->float64x2_class();
break;
default:
UNREACHABLE();
}
BoxAllocationSlowPath::Allocate(compiler, this, *cls, temp, temp2);
__ movq(temp2, temp);
__ StoreCompressedIntoObject(
instance_reg, compiler::FieldAddress(instance_reg, offset_in_bytes),
temp2, compiler::Assembler::kValueIsNotSmi);
} else {
__ LoadCompressed(temp,
compiler::FieldAddress(instance_reg, offset_in_bytes));
}
switch (cid) {
case kDoubleCid:
__ Comment("UnboxedDoubleStoreInstanceFieldInstr");
__ movsd(compiler::FieldAddress(temp, Double::value_offset()), value);
break;
case kFloat32x4Cid:
__ Comment("UnboxedFloat32x4StoreInstanceFieldInstr");
__ movups(compiler::FieldAddress(temp, Float32x4::value_offset()),
value);
break;
case kFloat64x2Cid:
__ Comment("UnboxedFloat64x2StoreInstanceFieldInstr");
__ movups(compiler::FieldAddress(temp, Float64x2::value_offset()),
value);
break;
default:
UNREACHABLE();
}
return;
}
if (IsPotentialUnboxedDartFieldStore()) {
ASSERT(memory_order_ != compiler::AssemblerBase::kRelease);
Register value_reg = locs()->in(kValuePos).reg();
Register temp = locs()->temp(0).reg();
Register temp2 = locs()->temp(1).reg();
FpuRegister fpu_temp = locs()->temp(2).fpu_reg();
if (ShouldEmitStoreBarrier()) {
// Value input is a writable register and should be manually preserved
// across allocation slow-path.
locs()->live_registers()->Add(locs()->in(kValuePos), kTagged);
}
compiler::Label store_pointer;
compiler::Label store_double;
compiler::Label store_float32x4;
compiler::Label store_float64x2;
__ LoadObject(temp, Field::ZoneHandle(Z, slot().field().Original()));
__ cmpw(compiler::FieldAddress(temp, Field::is_nullable_offset()),
compiler::Immediate(kNullCid));
__ j(EQUAL, &store_pointer);
__ movzxb(temp2, compiler::FieldAddress(temp, Field::kind_bits_offset()));
__ testq(temp2, compiler::Immediate(1 << Field::kUnboxingCandidateBit));
__ j(ZERO, &store_pointer);
__ cmpw(compiler::FieldAddress(temp, Field::guarded_cid_offset()),
compiler::Immediate(kDoubleCid));
__ j(EQUAL, &store_double);
__ cmpw(compiler::FieldAddress(temp, Field::guarded_cid_offset()),
compiler::Immediate(kFloat32x4Cid));
__ j(EQUAL, &store_float32x4);
__ cmpw(compiler::FieldAddress(temp, Field::guarded_cid_offset()),
compiler::Immediate(kFloat64x2Cid));
__ j(EQUAL, &store_float64x2);
// Fall through.
__ jmp(&store_pointer);
if (!compiler->is_optimizing()) {
locs()->live_registers()->Add(locs()->in(kInstancePos));
locs()->live_registers()->Add(locs()->in(kValuePos));
}
{
__ Bind(&store_double);
EnsureMutableBox(compiler, this, temp, compiler->double_class(),
instance_reg, offset_in_bytes, temp2);
__ movsd(fpu_temp,
compiler::FieldAddress(value_reg, Double::value_offset()));
__ movsd(compiler::FieldAddress(temp, Double::value_offset()), fpu_temp);
__ jmp(&skip_store);
}
{
__ Bind(&store_float32x4);
EnsureMutableBox(compiler, this, temp, compiler->float32x4_class(),
instance_reg, offset_in_bytes, temp2);
__ movups(fpu_temp,
compiler::FieldAddress(value_reg, Float32x4::value_offset()));
__ movups(compiler::FieldAddress(temp, Float32x4::value_offset()),
fpu_temp);
__ jmp(&skip_store);
}
{
__ Bind(&store_float64x2);
EnsureMutableBox(compiler, this, temp, compiler->float64x2_class(),
instance_reg, offset_in_bytes, temp2);
__ movups(fpu_temp,
compiler::FieldAddress(value_reg, Float64x2::value_offset()));
__ movups(compiler::FieldAddress(temp, Float64x2::value_offset()),
fpu_temp);
__ jmp(&skip_store);
}
__ Bind(&store_pointer);
}
const bool compressed = slot().is_compressed();
if (ShouldEmitStoreBarrier()) {
Register value_reg = locs()->in(kValuePos).reg();
if (!compressed) {
__ StoreIntoObject(instance_reg,
compiler::FieldAddress(instance_reg, offset_in_bytes),
value_reg, CanValueBeSmi(), memory_order_);
} else {
__ StoreCompressedIntoObject(
instance_reg, compiler::FieldAddress(instance_reg, offset_in_bytes),
value_reg, CanValueBeSmi(), memory_order_);
}
} else {
if (locs()->in(kValuePos).IsConstant()) {
const auto& value = locs()->in(kValuePos).constant();
if (!compressed) {
__ StoreIntoObjectNoBarrier(
instance_reg, compiler::FieldAddress(instance_reg, offset_in_bytes),
value, memory_order_);
} else {
__ StoreCompressedIntoObjectNoBarrier(
instance_reg, compiler::FieldAddress(instance_reg, offset_in_bytes),
value, memory_order_);
}
} else {
Register value_reg = locs()->in(kValuePos).reg();
if (!compressed) {
__ StoreIntoObjectNoBarrier(
instance_reg, compiler::FieldAddress(instance_reg, offset_in_bytes),
value_reg, memory_order_);
} else {
__ StoreCompressedIntoObjectNoBarrier(
instance_reg, compiler::FieldAddress(instance_reg, offset_in_bytes),
value_reg, memory_order_);
}
}
}
__ Bind(&skip_store);
}
LocationSummary* StoreStaticFieldInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 1;
const intptr_t kNumTemps = 1;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
locs->set_in(0, Location::RegisterLocation(kWriteBarrierValueReg));
locs->set_temp(0, Location::RequiresRegister());
return locs;
}
void StoreStaticFieldInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
Register value = locs()->in(0).reg();
Register temp = locs()->temp(0).reg();
compiler->used_static_fields().Add(&field());
__ movq(temp,
compiler::Address(
THR, compiler::target::Thread::field_table_values_offset()));
// Note: static fields ids won't be changed by hot-reload.
__ movq(
compiler::Address(temp, compiler::target::FieldTable::OffsetOf(field())),
value);
}
LocationSummary* InstanceOfInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 3;
const intptr_t kNumTemps = 0;
LocationSummary* summary = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kCall);
summary->set_in(0, Location::RegisterLocation(TypeTestABI::kInstanceReg));
summary->set_in(1, Location::RegisterLocation(
TypeTestABI::kInstantiatorTypeArgumentsReg));
summary->set_in(
2, Location::RegisterLocation(TypeTestABI::kFunctionTypeArgumentsReg));
summary->set_out(0, Location::RegisterLocation(RAX));
return summary;
}
void InstanceOfInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
ASSERT(locs()->in(0).reg() == TypeTestABI::kInstanceReg);
ASSERT(locs()->in(1).reg() == TypeTestABI::kInstantiatorTypeArgumentsReg);
ASSERT(locs()->in(2).reg() == TypeTestABI::kFunctionTypeArgumentsReg);
compiler->GenerateInstanceOf(source(), deopt_id(), env(), type(), locs());
ASSERT(locs()->out(0).reg() == RAX);
}
// TODO(srdjan): In case of constant inputs make CreateArray kNoCall and
// use slow path stub.
LocationSummary* CreateArrayInstr::MakeLocationSummary(Zone* zone,
bool opt) const {
const intptr_t kNumInputs = 2;
const intptr_t kNumTemps = 0;
LocationSummary* locs = new (zone)
LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kCall);
locs->set_in(kTypeArgumentsPos,
Location::RegisterLocation(AllocateArrayABI::kTypeArgumentsReg));
locs->set_in(kLengthPos,
Location::RegisterLocation(AllocateArrayABI::kLengthReg));
locs->set_out(0, Location::RegisterLocation(AllocateArrayABI::kResultReg));
return locs;
}
// Inlines array allocation for known constant values.
static void InlineArrayAllocation(FlowGraphCompiler* compiler,
intptr_t num_elements