| commit | be47aad327d0532e4d320d2383df450cce9e0020 | [log] [tgz] |
|---|---|---|
| author | Martin Kustermann <kustermann@google.com> | Fri Jan 18 16:13:17 2019 +0000 |
| committer | commit-bot@chromium.org <commit-bot@chromium.org> | Fri Jan 18 16:13:17 2019 +0000 |
| tree | ad8409e9945146fd6b44634095839aff0d9897ee | |
| parent | 10f63f806d0a33245e84334a10a8e144498b1ee9 [diff] |
[VM/Compiler/AOT] Bare instructions 9: Improve write barrier on ARM/ARM64/X64 ARM write barrier goes from ldrne lr, [thr, #+508] blxne lr to blne <offset> ARM64 write barrier goes from (similarly X64) beq +8 ldrx lr, [thr, #1056] blr lr to beq +4 bl <offset> It reduces RX on arm/arm64 by around 0.9% Though the write barrier wrappers stub has multiple entrypoints (one for each available register). Because of this, we modify the relocation logic to support per-call offsets into the target. To avoid making the assembler code depend on StubCode/FlowGraphCompiler, we set a closure, which the assembler can call. Issue https://github.com/dart-lang/sdk/issues/33274 Change-Id: I9e3d68260cab7ef19ea88f1235c78d6031819d6d Reviewed-on: https://dart-review.googlesource.com/c/90063 Commit-Queue: Martin Kustermann <kustermann@google.com> Reviewed-by: Vyacheslav Egorov <vegorov@google.com>
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