commit aa785d938b209c8c409d4a9a11340d6ac926fa51
author Aart Bik <ajcbik@google.com> Thu May 23 23:50:38 2019 +0000
committer commit-bot@chromium.org <commit-bot@chromium.org> Thu May 23 23:50:38 2019 +0000
tree 8251774878cd077c1e560807695c0159344f2d9e
parent 704446d159a76c4f538800b36dc1a0276053fd18

[dart/vm] Fix erroneous claim on "temp" Q7

Rationale:
Q7 is a scratch register, it cannot hold input/outputs.

https://github.com/flutter/flutter/issues/32708

Change-Id: I0ad23d2d3e363be14cf83b085b94ce9ff3a22261
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/103551
Reviewed-by: Alexander Markov <alexmarkov@google.com>
Commit-Queue: Aart Bik <ajcbik@google.com>

runtime/vm/compiler/backend/flow_graph_compiler_arm.cc

diff --git a/runtime/vm/compiler/backend/flow_graph_compiler_arm.cc b/runtime/vm/compiler/backend/flow_graph_compiler_arm.cc
index cd1dbf1..598cc1c 100644
--- a/runtime/vm/compiler/backend/flow_graph_compiler_arm.cc
+++ b/runtime/vm/compiler/backend/flow_graph_compiler_arm.cc
@@ -1432,12 +1432,14 @@
     if (TargetCPUFeatures::neon_supported()) {
       const QRegister dst = destination.fpu_reg();
       const QRegister src = source.fpu_reg();
+      ASSERT(dst != QTMP && src != QTMP);
       __ vmovq(QTMP, src);
       __ vmovq(src, dst);
       __ vmovq(dst, QTMP);
     } else {
       const DRegister dst = EvenDRegisterOf(destination.fpu_reg());
       const DRegister src = EvenDRegisterOf(source.fpu_reg());
+      ASSERT(dst != DTMP && src != DTMP);
       __ vmovd(DTMP, src);
       __ vmovd(src, dst);
       __ vmovd(dst, DTMP);

runtime/vm/compiler/backend/il_arm.cc

diff --git a/runtime/vm/compiler/backend/il_arm.cc b/runtime/vm/compiler/backend/il_arm.cc
index cf86087..5a34ee3 100644
--- a/runtime/vm/compiler/backend/il_arm.cc
+++ b/runtime/vm/compiler/backend/il_arm.cc
@@ -1295,10 +1295,10 @@
       (representation() == kUnboxedInt32x4) ||
       (representation() == kUnboxedFloat64x2)) {
     if (class_id() == kTypedDataFloat32ArrayCid) {
-      // Need register <= Q7 for float operations.
+      // Need register < Q7 for float operations.
       // TODO(fschneider): Add a register policy to specify a subset of
       // registers.
-      locs->set_out(0, Location::FpuRegisterLocation(Q7));
+      locs->set_out(0, Location::FpuRegisterLocation(Q6));
     } else {
       locs->set_out(0, Location::RequiresFpuRegister());
     }
@@ -1599,8 +1599,8 @@
                                      Location::RequiresRegister()));
       break;
     case kTypedDataFloat32ArrayCid:
-      // Need low register (<= Q7).
-      locs->set_in(2, Location::FpuRegisterLocation(Q7));
+      // Need low register (< Q7).
+      locs->set_in(2, Location::FpuRegisterLocation(Q6));
       break;
     case kTypedDataFloat64ArrayCid:  // TODO(srdjan): Support Float64 constants.
     case kTypedDataInt32x4ArrayCid:
@@ -5396,9 +5396,9 @@
   const intptr_t kNumTemps = 0;
   LocationSummary* result = new (zone)
       LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
-  // Low (<= Q7) Q registers are needed for the conversion instructions.
+  // Low (< Q7) Q registers are needed for the conversion instructions.
   result->set_in(0, Location::RequiresFpuRegister());
-  result->set_out(0, Location::FpuRegisterLocation(Q7));
+  result->set_out(0, Location::FpuRegisterLocation(Q6));
   return result;
 }
 
@@ -5415,8 +5415,8 @@
   const intptr_t kNumTemps = 0;
   LocationSummary* result = new (zone)
       LocationSummary(zone, kNumInputs, kNumTemps, LocationSummary::kNoCall);
-  // Low (<= Q7) Q registers are needed for the conversion instructions.
-  result->set_in(0, Location::FpuRegisterLocation(Q7));
+  // Low (< Q7) Q registers are needed for the conversion instructions.
+  result->set_in(0, Location::FpuRegisterLocation(Q6));
   result->set_out(0, Location::RequiresFpuRegister());
   return result;
 }