commit | 95d1ae911d5272f5911f75d8c80a74aaffe7863b | [log] [tgz] |
---|---|---|
author | Tess Strickland <sstrickl@google.com> | Tue Mar 29 08:03:35 2022 +0000 |
committer | Commit Bot <commit-bot@chromium.org> | Tue Mar 29 08:03:35 2022 +0000 |
tree | 47e19fbecc8dca5f7514c81b5a6964f79389bbfc | |
parent | 6bec28da380408fce8a9fd7f4405ed73cb95ad1b [diff] |
[vm] Reduce class id reloads in TTSes when possible. Now GenerateCidRangesCheck in the flow graph compiler returns whether the class id register was clobbered, so users that make multiple calls to it for the same cid know whether the cid needs reloading after the generated check. Also unifies FlowGraphCompiler::EmitTestAndCheckCid across architectures, since the non-Intel versions would have always forced reloading. TEST=vm/cc/TTS Change-Id: I08835dc97ba457b7dc8dfa51206b4741a607db22 Cq-Include-Trybots: luci.dart.try:vm-kernel-linux-release-simarm-try,vm-kernel-linux-release-simarm64-try,vm-kernel-mac-release-arm64-try,vm-kernel-precomp-linux-release-simarm_x64-try,vm-kernel-nnbd-mac-release-arm64-try,vm-kernel-nnbd-linux-release-simarm64-try,vm-kernel-nnbd-linux-release-simarm-try,vm-kernel-precomp-nnbd-linux-release-simarm_x64-try,vm-precomp-ffi-qemu-linux-release-arm-try,vm-kernel-linux-debug-simriscv64-try,vm-kernel-precomp-linux-debug-simriscv64-try Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/238583 Reviewed-by: Slava Egorov <vegorov@google.com> Commit-Queue: Tess Strickland <sstrickl@google.com>
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