| // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| // for details. All rights reserved. Use of this source code is governed by a |
| // BSD-style license that can be found in the LICENSE file. |
| |
| #include "vm/globals.h" // NOLINT |
| #if defined(TARGET_ARCH_X64) |
| |
| #include "vm/assembler.h" |
| #include "vm/cpu.h" |
| #include "vm/heap.h" |
| #include "vm/instructions.h" |
| #include "vm/locations.h" |
| #include "vm/memory_region.h" |
| #include "vm/runtime_entry.h" |
| #include "vm/stack_frame.h" |
| #include "vm/stub_code.h" |
| |
| namespace dart { |
| |
| DECLARE_FLAG(bool, allow_absolute_addresses); |
| DEFINE_FLAG(bool, print_stop_message, true, "Print stop message."); |
| DECLARE_FLAG(bool, inline_alloc); |
| |
| |
| Assembler::Assembler(bool use_far_branches) |
| : buffer_(), |
| prologue_offset_(-1), |
| comments_(), |
| constant_pool_allowed_(false) { |
| // Far branching mode is only needed and implemented for MIPS and ARM. |
| ASSERT(!use_far_branches); |
| } |
| |
| |
| void Assembler::InitializeMemoryWithBreakpoints(uword data, intptr_t length) { |
| memset(reinterpret_cast<void*>(data), Instr::kBreakPointInstruction, length); |
| } |
| |
| |
| void Assembler::call(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(reg); |
| EmitOperandREX(2, operand, REX_NONE); |
| EmitUint8(0xFF); |
| EmitOperand(2, operand); |
| } |
| |
| |
| void Assembler::call(const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(2, address, REX_NONE); |
| EmitUint8(0xFF); |
| EmitOperand(2, address); |
| } |
| |
| |
| void Assembler::call(Label* label) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| static const int kSize = 5; |
| EmitUint8(0xE8); |
| EmitLabel(label, kSize); |
| } |
| |
| |
| void Assembler::LoadNativeEntry(Register dst, |
| const ExternalLabel* label, |
| Patchability patchable) { |
| const int32_t offset = ObjectPool::element_offset( |
| object_pool_wrapper_.FindNativeEntry(label, patchable)); |
| LoadWordFromPoolOffset(dst, offset - kHeapObjectTag); |
| } |
| |
| |
| void Assembler::call(const ExternalLabel* label) { |
| { // Encode movq(TMP, Immediate(label->address())), but always as imm64. |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(TMP, REX_W); |
| EmitUint8(0xB8 | (TMP & 7)); |
| EmitInt64(label->address()); |
| } |
| call(TMP); |
| } |
| |
| |
| void Assembler::CallPatchable(const StubEntry& stub_entry) { |
| ASSERT(constant_pool_allowed()); |
| const Code& target = Code::Handle(stub_entry.code()); |
| intptr_t call_start = buffer_.GetPosition(); |
| const int32_t offset = ObjectPool::element_offset( |
| object_pool_wrapper_.FindObject(target, kPatchable)); |
| LoadWordFromPoolOffset(CODE_REG, offset - kHeapObjectTag); |
| movq(TMP, FieldAddress(CODE_REG, Code::entry_point_offset())); |
| call(TMP); |
| ASSERT((buffer_.GetPosition() - call_start) == kCallExternalLabelSize); |
| } |
| |
| |
| void Assembler::Call(const StubEntry& stub_entry) { |
| ASSERT(constant_pool_allowed()); |
| const Code& target = Code::Handle(stub_entry.code()); |
| const int32_t offset = ObjectPool::element_offset( |
| object_pool_wrapper_.FindObject(target, kNotPatchable)); |
| LoadWordFromPoolOffset(CODE_REG, offset - kHeapObjectTag); |
| movq(TMP, FieldAddress(CODE_REG, Code::entry_point_offset())); |
| call(TMP); |
| } |
| |
| |
| void Assembler::pushq(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(reg, REX_NONE); |
| EmitUint8(0x50 | (reg & 7)); |
| } |
| |
| |
| void Assembler::pushq(const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(6, address, REX_NONE); |
| EmitUint8(0xFF); |
| EmitOperand(6, address); |
| } |
| |
| |
| void Assembler::pushq(const Immediate& imm) { |
| if (imm.is_int8()) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x6A); |
| EmitUint8(imm.value() & 0xFF); |
| } else if (imm.is_int32()) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x68); |
| EmitImmediate(imm); |
| } else { |
| movq(TMP, imm); |
| pushq(TMP); |
| } |
| } |
| |
| |
| void Assembler::PushImmediate(const Immediate& imm) { |
| if (imm.is_int32()) { |
| pushq(imm); |
| } else { |
| LoadImmediate(TMP, imm); |
| pushq(TMP); |
| } |
| } |
| |
| |
| void Assembler::popq(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(reg, REX_NONE); |
| EmitUint8(0x58 | (reg & 7)); |
| } |
| |
| |
| void Assembler::popq(const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(0, address, REX_NONE); |
| EmitUint8(0x8F); |
| EmitOperand(0, address); |
| } |
| |
| |
| void Assembler::setcc(Condition condition, ByteRegister dst) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x0F); |
| EmitUint8(0x90 + condition); |
| EmitUint8(0xC0 + dst); |
| } |
| |
| |
| void Assembler::movl(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_NONE); |
| EmitUint8(0x8B); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::movl(Register dst, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(dst); |
| EmitOperandREX(0, operand, REX_NONE); |
| EmitUint8(0xC7); |
| EmitOperand(0, operand); |
| ASSERT(imm.is_int32()); |
| EmitImmediate(imm); |
| } |
| |
| |
| void Assembler::movl(Register dst, const Address& src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, src, REX_NONE); |
| EmitUint8(0x8B); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::movl(const Address& dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(src, dst, REX_NONE); |
| EmitUint8(0x89); |
| EmitOperand(src & 7, dst); |
| } |
| |
| |
| void Assembler::movl(const Address& dst, const Immediate& imm) { |
| movl(TMP, imm); |
| movl(dst, TMP); |
| } |
| |
| |
| void Assembler::movzxb(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xB6); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::movzxb(Register dst, const Address& src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, src, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xB6); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::movsxb(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xBE); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::movsxb(Register dst, const Address& src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, src, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xBE); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::movb(Register dst, const Address& src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, src, REX_NONE); |
| EmitUint8(0x8A); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::movb(const Address& dst, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(0, dst, REX_NONE); |
| EmitUint8(0xC6); |
| EmitOperand(0, dst); |
| ASSERT(imm.is_int8()); |
| EmitUint8(imm.value() & 0xFF); |
| } |
| |
| |
| void Assembler::movb(const Address& dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(src, dst, REX_NONE); |
| EmitUint8(0x88); |
| EmitOperand(src & 7, dst); |
| } |
| |
| |
| void Assembler::movzxw(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xB7); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::movzxw(Register dst, const Address& src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, src, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xB7); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::movsxw(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xBF); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::movsxw(Register dst, const Address& src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, src, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xBF); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::movw(Register dst, const Address& src) { |
| FATAL("Use movzxw or movsxw instead."); |
| } |
| |
| |
| void Assembler::movw(const Address& dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandSizeOverride(); |
| EmitOperandREX(src, dst, REX_NONE); |
| EmitUint8(0x89); |
| EmitOperand(src & 7, dst); |
| } |
| |
| |
| void Assembler::movw(const Address& dst, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandSizeOverride(); |
| EmitUint8(0xC7); |
| EmitOperand(0, dst); |
| EmitUint8(imm.value() & 0xFF); |
| EmitUint8((imm.value() >> 8) & 0xFF); |
| } |
| |
| |
| void Assembler::movq(Register dst, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| if (imm.is_int32()) { |
| Operand operand(dst); |
| EmitOperandREX(0, operand, REX_W); |
| EmitUint8(0xC7); |
| EmitOperand(0, operand); |
| } else { |
| EmitRegisterREX(dst, REX_W); |
| EmitUint8(0xB8 | (dst & 7)); |
| } |
| EmitImmediate(imm); |
| } |
| |
| |
| // Use 0x89 encoding (instead of 0x8B encoding), which is expected by gdb64 |
| // older than 7.3.1-gg5 when disassembling a function's prologue (movq rbp, rsp) |
| // for proper unwinding of Dart frames (use --generate_gdb_symbols and -O0). |
| void Assembler::movq(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(dst); |
| EmitOperandREX(src, operand, REX_W); |
| EmitUint8(0x89); |
| EmitOperand(src & 7, operand); |
| } |
| |
| |
| void Assembler::movq(Register dst, const Address& src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, src, REX_W); |
| EmitUint8(0x8B); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::movq(const Address& dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(src, dst, REX_W); |
| EmitUint8(0x89); |
| EmitOperand(src & 7, dst); |
| } |
| |
| |
| void Assembler::movq(const Address& dst, const Immediate& imm) { |
| if (imm.is_int32()) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(dst); |
| EmitOperandREX(0, operand, REX_W); |
| EmitUint8(0xC7); |
| EmitOperand(0, operand); |
| EmitImmediate(imm); |
| } else { |
| movq(TMP, imm); |
| movq(dst, TMP); |
| } |
| } |
| |
| |
| void Assembler::movsxd(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x63); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::movsxd(Register dst, const Address& src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, src, REX_W); |
| EmitUint8(0x63); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::rep_movsb() { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF3); |
| EmitUint8(0xA4); |
| } |
| |
| |
| void Assembler::leaq(Register dst, const Address& src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, src, REX_W); |
| EmitUint8(0x8D); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::cmovnoq(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0x41); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::cmoveq(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0x44); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::cmovgeq(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0x4D); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::cmovlessq(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0x4C); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| |
| void Assembler::movss(XmmRegister dst, const Address& src) { |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF3); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x10); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::movss(const Address& dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF3); |
| EmitREX_RB(src, dst); |
| EmitUint8(0x0F); |
| EmitUint8(0x11); |
| EmitOperand(src & 7, dst); |
| } |
| |
| |
| void Assembler::movss(XmmRegister dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF3); |
| EmitREX_RB(src, dst); |
| EmitUint8(0x0F); |
| EmitUint8(0x11); |
| EmitXmmRegisterOperand(src & 7, dst); |
| } |
| |
| |
| void Assembler::movd(XmmRegister dst, Register src) { |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x6E); |
| EmitOperand(dst & 7, Operand(src)); |
| } |
| |
| |
| void Assembler::movd(Register dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x66); |
| EmitREX_RB(src, dst); |
| EmitUint8(0x0F); |
| EmitUint8(0x7E); |
| EmitOperand(src & 7, Operand(dst)); |
| } |
| |
| |
| void Assembler::addss(XmmRegister dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF3); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x58); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::subss(XmmRegister dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF3); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5C); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::mulss(XmmRegister dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF3); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x59); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::divss(XmmRegister dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF3); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5E); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::movsd(XmmRegister dst, const Address& src) { |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF2); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x10); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::movsd(const Address& dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF2); |
| EmitREX_RB(src, dst); |
| EmitUint8(0x0F); |
| EmitUint8(0x11); |
| EmitOperand(src & 7, dst); |
| } |
| |
| |
| void Assembler::movsd(XmmRegister dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF2); |
| EmitREX_RB(src, dst); |
| EmitUint8(0x0F); |
| EmitUint8(0x11); |
| EmitXmmRegisterOperand(src & 7, dst); |
| } |
| |
| |
| void Assembler::movaps(XmmRegister dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x28); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::movups(XmmRegister dst, const Address& src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x10); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::movups(const Address& dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(src, dst); |
| EmitUint8(0x0F); |
| EmitUint8(0x11); |
| EmitOperand(src & 7, dst); |
| } |
| |
| |
| void Assembler::addsd(XmmRegister dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF2); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x58); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::subsd(XmmRegister dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF2); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5C); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::mulsd(XmmRegister dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF2); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x59); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::divsd(XmmRegister dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF2); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5E); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::addpl(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0xFE); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::subpl(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0xFA); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::addps(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x58); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::subps(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5C); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::divps(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5E); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::mulps(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x59); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::minps(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5D); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::maxps(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5F); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::andps(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x54); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::andps(XmmRegister dst, const Address& src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x54); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::orps(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x56); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| void Assembler::notps(XmmRegister dst) { |
| static const struct ALIGN16 { |
| uint32_t a; |
| uint32_t b; |
| uint32_t c; |
| uint32_t d; |
| } float_not_constant = |
| { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }; |
| LoadImmediate( |
| TMP, Immediate(reinterpret_cast<intptr_t>(&float_not_constant))); |
| xorps(dst, Address(TMP, 0)); |
| } |
| |
| |
| void Assembler::negateps(XmmRegister dst) { |
| static const struct ALIGN16 { |
| uint32_t a; |
| uint32_t b; |
| uint32_t c; |
| uint32_t d; |
| } float_negate_constant = |
| { 0x80000000, 0x80000000, 0x80000000, 0x80000000 }; |
| LoadImmediate( |
| TMP, Immediate(reinterpret_cast<intptr_t>(&float_negate_constant))); |
| xorps(dst, Address(TMP, 0)); |
| } |
| |
| |
| void Assembler::absps(XmmRegister dst) { |
| static const struct ALIGN16 { |
| uint32_t a; |
| uint32_t b; |
| uint32_t c; |
| uint32_t d; |
| } float_absolute_constant = |
| { 0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF, 0x7FFFFFFF }; |
| LoadImmediate( |
| TMP, Immediate(reinterpret_cast<intptr_t>(&float_absolute_constant))); |
| andps(dst, Address(TMP, 0)); |
| } |
| |
| |
| void Assembler::zerowps(XmmRegister dst) { |
| static const struct ALIGN16 { |
| uint32_t a; |
| uint32_t b; |
| uint32_t c; |
| uint32_t d; |
| } float_zerow_constant = |
| { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000 }; |
| LoadImmediate( |
| TMP, Immediate(reinterpret_cast<intptr_t>(&float_zerow_constant))); |
| andps(dst, Address(TMP, 0)); |
| } |
| |
| |
| void Assembler::cmppseq(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0xC2); |
| EmitXmmRegisterOperand(dst & 7, src); |
| EmitUint8(0x0); |
| } |
| |
| |
| void Assembler::cmppsneq(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0xC2); |
| EmitXmmRegisterOperand(dst & 7, src); |
| EmitUint8(0x4); |
| } |
| |
| |
| void Assembler::cmppslt(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0xC2); |
| EmitXmmRegisterOperand(dst & 7, src); |
| EmitUint8(0x1); |
| } |
| |
| |
| void Assembler::cmppsle(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0xC2); |
| EmitXmmRegisterOperand(dst & 7, src); |
| EmitUint8(0x2); |
| } |
| |
| |
| void Assembler::cmppsnlt(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0xC2); |
| EmitXmmRegisterOperand(dst & 7, src); |
| EmitUint8(0x5); |
| } |
| |
| |
| void Assembler::cmppsnle(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0xC2); |
| EmitXmmRegisterOperand(dst & 7, src); |
| EmitUint8(0x6); |
| } |
| |
| |
| void Assembler::sqrtps(XmmRegister dst) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, dst); |
| EmitUint8(0x0F); |
| EmitUint8(0x51); |
| EmitXmmRegisterOperand(dst & 7, dst); |
| } |
| |
| |
| void Assembler::rsqrtps(XmmRegister dst) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, dst); |
| EmitUint8(0x0F); |
| EmitUint8(0x52); |
| EmitXmmRegisterOperand(dst & 7, dst); |
| } |
| |
| |
| void Assembler::reciprocalps(XmmRegister dst) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, dst); |
| EmitUint8(0x0F); |
| EmitUint8(0x53); |
| EmitXmmRegisterOperand(dst & 7, dst); |
| } |
| |
| |
| void Assembler::movhlps(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x12); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::movlhps(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x16); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::unpcklps(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x14); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::unpckhps(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x15); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::unpcklpd(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x14); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::unpckhpd(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x15); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::set1ps(XmmRegister dst, Register tmp1, const Immediate& imm) { |
| // Load 32-bit immediate value into tmp1. |
| movl(tmp1, imm); |
| // Move value from tmp1 into dst. |
| movd(dst, tmp1); |
| // Broadcast low lane into other three lanes. |
| shufps(dst, dst, Immediate(0x0)); |
| } |
| |
| |
| void Assembler::shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0xC6); |
| EmitXmmRegisterOperand(dst & 7, src); |
| ASSERT(imm.is_uint8()); |
| EmitUint8(imm.value()); |
| } |
| |
| |
| void Assembler::addpd(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x58); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::negatepd(XmmRegister dst) { |
| static const struct ALIGN16 { |
| uint64_t a; |
| uint64_t b; |
| } double_negate_constant = |
| { 0x8000000000000000LL, 0x8000000000000000LL }; |
| LoadImmediate( |
| TMP, Immediate(reinterpret_cast<intptr_t>(&double_negate_constant))); |
| xorpd(dst, Address(TMP, 0)); |
| } |
| |
| |
| void Assembler::subpd(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5C); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::mulpd(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x59); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::divpd(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5E); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::abspd(XmmRegister dst) { |
| static const struct ALIGN16 { |
| uint64_t a; |
| uint64_t b; |
| } double_absolute_const = |
| { 0x7FFFFFFFFFFFFFFFLL, 0x7FFFFFFFFFFFFFFFLL }; |
| LoadImmediate( |
| TMP, Immediate(reinterpret_cast<intptr_t>(&double_absolute_const))); |
| andpd(dst, Address(TMP, 0)); |
| } |
| |
| |
| void Assembler::minpd(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5D); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::maxpd(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5F); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::sqrtpd(XmmRegister dst) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| ASSERT(dst <= XMM15); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, dst); |
| EmitUint8(0x0F); |
| EmitUint8(0x51); |
| EmitXmmRegisterOperand(dst & 7, dst); |
| } |
| |
| |
| void Assembler::cvtps2pd(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5A); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::cvtpd2ps(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5A); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0xC6); |
| EmitXmmRegisterOperand(dst & 7, src); |
| ASSERT(imm.is_uint8()); |
| EmitUint8(imm.value()); |
| } |
| |
| |
| void Assembler::comisd(XmmRegister a, XmmRegister b) { |
| ASSERT(a <= XMM15); |
| ASSERT(b <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x66); |
| EmitREX_RB(a, b); |
| EmitUint8(0x0F); |
| EmitUint8(0x2F); |
| EmitXmmRegisterOperand(a & 7, b); |
| } |
| |
| |
| void Assembler::movmskpd(Register dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x50); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::movmskps(Register dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x50); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::sqrtsd(XmmRegister dst, XmmRegister src) { |
| ASSERT(dst <= XMM15); |
| ASSERT(src <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF2); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x51); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::xorpd(XmmRegister dst, const Address& src) { |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x66); |
| EmitOperandREX(dst, src, REX_NONE); |
| EmitUint8(0x0F); |
| EmitUint8(0x57); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::xorpd(XmmRegister dst, XmmRegister src) { |
| ASSERT(dst <= XMM15); |
| ASSERT(src <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x57); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::xorps(XmmRegister dst, const Address& src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x57); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::xorps(XmmRegister dst, XmmRegister src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x57); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| void Assembler::andpd(XmmRegister dst, const Address& src) { |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x66); |
| EmitOperandREX(dst, src, REX_NONE); |
| EmitUint8(0x0F); |
| EmitUint8(0x54); |
| EmitOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::cvtsi2sdq(XmmRegister dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| ASSERT(dst <= XMM15); |
| Operand operand(src); |
| EmitUint8(0xF2); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0x2A); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::cvtsi2sdl(XmmRegister dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| ASSERT(dst <= XMM15); |
| Operand operand(src); |
| EmitUint8(0xF2); |
| EmitOperandREX(dst, operand, REX_NONE); |
| EmitUint8(0x0F); |
| EmitUint8(0x2A); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::cvttsd2siq(Register dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF2); |
| Operand operand(dst); |
| EmitREX_RB(dst, src, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0x2C); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::cvtss2sd(XmmRegister dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF3); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5A); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::cvtsd2ss(XmmRegister dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF2); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x5A); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::pxor(XmmRegister dst, XmmRegister src) { |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0xEF); |
| EmitXmmRegisterOperand(dst & 7, src); |
| } |
| |
| |
| void Assembler::roundsd(XmmRegister dst, XmmRegister src, RoundingMode mode) { |
| ASSERT(src <= XMM15); |
| ASSERT(dst <= XMM15); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x66); |
| EmitREX_RB(dst, src); |
| EmitUint8(0x0F); |
| EmitUint8(0x3A); |
| EmitUint8(0x0B); |
| EmitXmmRegisterOperand(dst & 7, src); |
| // Mask precision exeption. |
| EmitUint8(static_cast<uint8_t>(mode) | 0x8); |
| } |
| |
| |
| void Assembler::fldl(const Address& src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xDD); |
| EmitOperand(0, src); |
| } |
| |
| |
| void Assembler::fstpl(const Address& dst) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xDD); |
| EmitOperand(3, dst); |
| } |
| |
| |
| void Assembler::fildl(const Address& src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xDF); |
| EmitOperand(5, src); |
| } |
| |
| |
| void Assembler::fincstp() { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xD9); |
| EmitUint8(0xF7); |
| } |
| |
| |
| void Assembler::ffree(intptr_t value) { |
| ASSERT(value < 7); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xDD); |
| EmitUint8(0xC0 + value); |
| } |
| |
| |
| void Assembler::fsin() { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xD9); |
| EmitUint8(0xFE); |
| } |
| |
| |
| void Assembler::fcos() { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xD9); |
| EmitUint8(0xFF); |
| } |
| |
| |
| void Assembler::xchgl(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_NONE); |
| EmitUint8(0x87); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::xchgq(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x87); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::cmpb(const Address& address, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(7, address, REX_NONE); |
| EmitUint8(0x80); |
| EmitOperand(7, address); |
| ASSERT(imm.is_int8()); |
| EmitUint8(imm.value() & 0xFF); |
| } |
| |
| |
| void Assembler::cmpw(Register reg, const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandSizeOverride(); |
| EmitUint8(0x3B); |
| EmitOperand(reg, address); |
| } |
| |
| |
| void Assembler::cmpw(const Address& address, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandSizeOverride(); |
| EmitUint8(0x81); |
| EmitOperand(7, address); |
| EmitUint8(imm.value() & 0xFF); |
| EmitUint8((imm.value() >> 8) & 0xFF); |
| } |
| |
| |
| void Assembler::cmpl(Register reg, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(reg, REX_NONE); |
| EmitComplex(7, Operand(reg), imm); |
| } |
| |
| |
| void Assembler::cmpl(Register reg0, Register reg1) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(reg1); |
| EmitOperandREX(reg0, operand, REX_NONE); |
| EmitUint8(0x3B); |
| EmitOperand(reg0 & 7, operand); |
| } |
| |
| |
| void Assembler::cmpl(Register reg, const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(reg, address, REX_NONE); |
| EmitUint8(0x3B); |
| EmitOperand(reg & 7, address); |
| } |
| |
| |
| void Assembler::cmpl(const Address& address, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(address); |
| EmitOperandREX(7, operand, REX_NONE); |
| EmitComplex(7, operand, imm); |
| } |
| |
| |
| void Assembler::cmpq(const Address& address, Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(reg, address, REX_W); |
| EmitUint8(0x39); |
| EmitOperand(reg & 7, address); |
| } |
| |
| |
| void Assembler::cmpq(const Address& address, const Immediate& imm) { |
| if (imm.is_int32()) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(address); |
| EmitOperandREX(7, operand, REX_W); |
| EmitComplex(7, operand, imm); |
| } else { |
| movq(TMP, imm); |
| cmpq(address, TMP); |
| } |
| } |
| |
| |
| void Assembler::cmpq(Register reg, const Immediate& imm) { |
| if (imm.is_int32()) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(reg, REX_W); |
| EmitComplex(7, Operand(reg), imm); |
| } else { |
| ASSERT(reg != TMP); |
| movq(TMP, imm); |
| cmpq(reg, TMP); |
| } |
| } |
| |
| |
| void Assembler::cmpq(Register reg0, Register reg1) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(reg1); |
| EmitOperandREX(reg0, operand, REX_W); |
| EmitUint8(0x3B); |
| EmitOperand(reg0 & 7, operand); |
| } |
| |
| |
| void Assembler::cmpq(Register reg, const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(reg, address, REX_W); |
| EmitUint8(0x3B); |
| EmitOperand(reg & 7, address); |
| } |
| |
| |
| void Assembler::CompareImmediate(Register reg, const Immediate& imm) { |
| if (imm.is_int32()) { |
| cmpq(reg, imm); |
| } else { |
| ASSERT(reg != TMP); |
| LoadImmediate(TMP, imm); |
| cmpq(reg, TMP); |
| } |
| } |
| |
| |
| void Assembler::CompareImmediate(const Address& address, const Immediate& imm) { |
| if (imm.is_int32()) { |
| cmpq(address, imm); |
| } else { |
| LoadImmediate(TMP, imm); |
| cmpq(address, TMP); |
| } |
| } |
| |
| |
| void Assembler::testl(Register reg1, Register reg2) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(reg2); |
| EmitOperandREX(reg1, operand, REX_NONE); |
| EmitUint8(0x85); |
| EmitOperand(reg1 & 7, operand); |
| } |
| |
| |
| void Assembler::testl(Register reg, const Immediate& imm) { |
| // TODO(kasperl): Deal with registers r8-r15 using the short |
| // encoding form of the immediate? |
| |
| // We are using RBP for the exception marker. See testl(Label*). |
| ASSERT(reg != RBP); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| // For registers that have a byte variant (RAX, RBX, RCX, and RDX) |
| // we only test the byte register to keep the encoding short. |
| if (imm.is_uint8() && reg < 4) { |
| // Use zero-extended 8-bit immediate. |
| if (reg == RAX) { |
| EmitUint8(0xA8); |
| } else { |
| EmitUint8(0xF6); |
| EmitUint8(0xC0 + reg); |
| } |
| EmitUint8(imm.value() & 0xFF); |
| } else { |
| ASSERT(imm.is_int32()); |
| if (reg == RAX) { |
| EmitUint8(0xA9); |
| } else { |
| EmitRegisterREX(reg, REX_NONE); |
| EmitUint8(0xF7); |
| EmitUint8(0xC0 | (reg & 7)); |
| } |
| EmitImmediate(imm); |
| } |
| } |
| |
| |
| void Assembler::testb(const Address& address, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(0, address, REX_NONE); |
| EmitUint8(0xF6); |
| EmitOperand(0, address); |
| ASSERT(imm.is_int8()); |
| EmitUint8(imm.value() & 0xFF); |
| } |
| |
| |
| void Assembler::testq(Register reg1, Register reg2) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(reg2); |
| EmitOperandREX(reg1, operand, REX_W); |
| EmitUint8(0x85); |
| EmitOperand(reg1 & 7, operand); |
| } |
| |
| |
| void Assembler::testq(Register reg, const Immediate& imm) { |
| // TODO(kasperl): Deal with registers r8-r15 using the short |
| // encoding form of the immediate? |
| |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| // For registers that have a byte variant (RAX, RBX, RCX, and RDX) |
| // we only test the byte register to keep the encoding short. |
| if (imm.is_uint8() && reg < 4) { |
| // Use zero-extended 8-bit immediate. |
| if (reg == RAX) { |
| EmitUint8(0xA8); |
| } else { |
| EmitUint8(0xF6); |
| EmitUint8(0xC0 + reg); |
| } |
| EmitUint8(imm.value() & 0xFF); |
| } else { |
| ASSERT(imm.is_int32()); |
| if (reg == RAX) { |
| EmitUint8(0xA9 | REX_W); |
| } else { |
| EmitRegisterREX(reg, REX_W); |
| EmitUint8(0xF7); |
| EmitUint8(0xC0 | (reg & 7)); |
| } |
| EmitImmediate(imm); |
| } |
| } |
| |
| |
| void Assembler::TestImmediate(Register dst, const Immediate& imm) { |
| if (imm.is_int32()) { |
| testq(dst, imm); |
| } else { |
| ASSERT(dst != TMP); |
| LoadImmediate(TMP, imm); |
| testq(dst, TMP); |
| } |
| } |
| |
| |
| void Assembler::andl(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_NONE); |
| EmitUint8(0x23); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::andl(Register dst, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(dst, REX_NONE); |
| EmitComplex(4, Operand(dst), imm); |
| } |
| |
| |
| void Assembler::orl(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_NONE); |
| EmitUint8(0x0B); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::orl(Register dst, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(dst, REX_NONE); |
| EmitComplex(1, Operand(dst), imm); |
| } |
| |
| |
| void Assembler::orl(const Address& address, Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(reg, address, REX_NONE); |
| EmitUint8(0x09); |
| EmitOperand(reg & 7, address); |
| } |
| |
| |
| void Assembler::xorl(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_NONE); |
| EmitUint8(0x33); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::andq(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x23); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::andq(Register dst, const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, address, REX_W); |
| EmitUint8(0x23); |
| EmitOperand(dst & 7, address); |
| } |
| |
| |
| void Assembler::andq(Register dst, const Immediate& imm) { |
| if (imm.is_int32()) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(dst, REX_W); |
| EmitComplex(4, Operand(dst), imm); |
| } else { |
| ASSERT(dst != TMP); |
| movq(TMP, imm); |
| andq(dst, TMP); |
| } |
| } |
| |
| |
| void Assembler::AndImmediate(Register dst, const Immediate& imm) { |
| if (imm.is_int32()) { |
| andq(dst, imm); |
| } else { |
| ASSERT(dst != TMP); |
| LoadImmediate(TMP, imm); |
| andq(dst, TMP); |
| } |
| } |
| |
| |
| void Assembler::orq(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x0B); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::orq(Register dst, const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, address, REX_W); |
| EmitUint8(0x0B); |
| EmitOperand(dst & 7, address); |
| } |
| |
| |
| void Assembler::orq(Register dst, const Immediate& imm) { |
| if (imm.is_int32()) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(dst, REX_W); |
| EmitComplex(1, Operand(dst), imm); |
| } else { |
| ASSERT(dst != TMP); |
| movq(TMP, imm); |
| orq(dst, TMP); |
| } |
| } |
| |
| |
| void Assembler::OrImmediate(Register dst, const Immediate& imm) { |
| if (imm.is_int32()) { |
| orq(dst, imm); |
| } else { |
| ASSERT(dst != TMP); |
| LoadImmediate(TMP, imm); |
| orq(dst, TMP); |
| } |
| } |
| |
| |
| void Assembler::xorq(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x33); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::xorq(Register dst, const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, address, REX_W); |
| EmitUint8(0x33); |
| EmitOperand(dst & 7, address); |
| } |
| |
| |
| void Assembler::xorq(const Address& dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(src, dst, REX_W); |
| EmitUint8(0x31); |
| EmitOperand(src & 7, dst); |
| } |
| |
| |
| void Assembler::xorq(Register dst, const Immediate& imm) { |
| if (imm.is_int32()) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(dst, REX_W); |
| EmitComplex(6, Operand(dst), imm); |
| } else { |
| ASSERT(dst != TMP); |
| movq(TMP, imm); |
| xorq(dst, TMP); |
| } |
| } |
| |
| |
| void Assembler::XorImmediate(Register dst, const Immediate& imm) { |
| if (imm.is_int32()) { |
| xorq(dst, imm); |
| } else { |
| ASSERT(dst != TMP); |
| LoadImmediate(TMP, imm); |
| xorq(dst, TMP); |
| } |
| } |
| |
| |
| void Assembler::addl(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_NONE); |
| EmitUint8(0x03); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::addl(Register dst, const Immediate& imm) { |
| ASSERT(imm.is_int32()); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(dst, REX_NONE); |
| EmitComplex(0, Operand(dst), imm); |
| } |
| |
| |
| void Assembler::addl(Register dst, const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, address, REX_NONE); |
| EmitUint8(0x03); |
| EmitOperand(dst & 7, address); |
| } |
| |
| |
| void Assembler::addl(const Address& address, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(src, address, REX_NONE); |
| EmitUint8(0x01); |
| EmitOperand(src & 7, address); |
| } |
| |
| |
| void Assembler::adcl(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_NONE); |
| EmitUint8(0x13); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::adcl(Register dst, const Immediate& imm) { |
| ASSERT(imm.is_int32()); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(dst, REX_NONE); |
| EmitComplex(2, Operand(dst), imm); |
| } |
| |
| |
| void Assembler::adcl(Register dst, const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, address, REX_NONE); |
| EmitUint8(0x13); |
| EmitOperand(dst & 7, address); |
| } |
| |
| |
| void Assembler::addq(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x03); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::addq(Register dst, const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, address, REX_W); |
| EmitUint8(0x03); |
| EmitOperand(dst & 7, address); |
| } |
| |
| |
| void Assembler::addq(Register dst, const Immediate& imm) { |
| if (imm.is_int32()) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(dst, REX_W); |
| EmitComplex(0, Operand(dst), imm); |
| } else { |
| ASSERT(dst != TMP); |
| movq(TMP, imm); |
| addq(dst, TMP); |
| } |
| } |
| |
| |
| void Assembler::addq(const Address& address, const Immediate& imm) { |
| if (imm.is_int32()) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(0, address, REX_W); |
| EmitComplex(0, Operand(address), imm); |
| } else { |
| movq(TMP, imm); |
| addq(address, TMP); |
| } |
| } |
| |
| |
| void Assembler::addq(const Address& address, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(src, address, REX_W); |
| EmitUint8(0x01); |
| EmitOperand(src & 7, address); |
| } |
| |
| |
| void Assembler::adcq(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x13); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::adcq(Register dst, const Immediate& imm) { |
| if (imm.is_int32()) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(dst, REX_W); |
| EmitComplex(2, Operand(dst), imm); |
| } else { |
| ASSERT(dst != TMP); |
| movq(TMP, imm); |
| adcq(dst, TMP); |
| } |
| } |
| |
| |
| void Assembler::adcq(Register dst, const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, address, REX_W); |
| EmitUint8(0x13); |
| EmitOperand(dst & 7, address); |
| } |
| |
| |
| void Assembler::subl(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_NONE); |
| EmitUint8(0x2B); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::subl(Register dst, const Immediate& imm) { |
| ASSERT(imm.is_int32()); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(dst, REX_NONE); |
| EmitComplex(3, Operand(dst), imm); |
| } |
| |
| |
| void Assembler::subl(Register dst, const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, address, REX_NONE); |
| EmitUint8(0x2B); |
| EmitOperand(dst & 7, address); |
| } |
| |
| |
| void Assembler::sbbl(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_NONE); |
| EmitUint8(0x1B); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::sbbl(Register dst, const Immediate& imm) { |
| ASSERT(imm.is_int32()); |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(dst, REX_NONE); |
| EmitComplex(3, Operand(dst), imm); |
| } |
| |
| |
| void Assembler::sbbl(Register dst, const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, address, REX_NONE); |
| EmitUint8(0x1B); |
| EmitOperand(dst & 7, address); |
| } |
| |
| |
| void Assembler::cdq() { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x99); |
| } |
| |
| |
| void Assembler::cqo() { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(RAX, REX_W); |
| EmitUint8(0x99); |
| } |
| |
| |
| void Assembler::idivl(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(reg, REX_NONE); |
| EmitUint8(0xF7); |
| EmitOperand(7, Operand(reg)); |
| } |
| |
| |
| void Assembler::divl(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(reg, REX_NONE); |
| EmitUint8(0xF7); |
| EmitOperand(6, Operand(reg)); |
| } |
| |
| |
| void Assembler::idivq(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(reg, REX_W); |
| EmitUint8(0xF7); |
| EmitOperand(7, Operand(reg)); |
| } |
| |
| |
| void Assembler::divq(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(reg, REX_W); |
| EmitUint8(0xF7); |
| EmitOperand(6, Operand(reg)); |
| } |
| |
| |
| void Assembler::imull(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_NONE); |
| EmitUint8(0x0F); |
| EmitUint8(0xAF); |
| EmitOperand(dst & 7, Operand(src)); |
| } |
| |
| |
| void Assembler::imull(Register reg, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(reg); |
| EmitOperandREX(reg, operand, REX_NONE); |
| EmitUint8(0x69); |
| EmitOperand(reg & 7, Operand(reg)); |
| EmitImmediate(imm); |
| } |
| |
| |
| void Assembler::mull(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(reg, REX_NONE); |
| EmitUint8(0xF7); |
| EmitOperand(4, Operand(reg)); |
| } |
| |
| |
| void Assembler::imulq(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xAF); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::imulq(Register reg, const Immediate& imm) { |
| if (imm.is_int32()) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(reg); |
| EmitOperandREX(reg, operand, REX_W); |
| EmitUint8(0x69); |
| EmitOperand(reg & 7, Operand(reg)); |
| EmitImmediate(imm); |
| } else { |
| ASSERT(reg != TMP); |
| movq(TMP, imm); |
| imulq(reg, TMP); |
| } |
| } |
| |
| |
| void Assembler::MulImmediate(Register reg, const Immediate& imm) { |
| if (imm.is_int32()) { |
| imulq(reg, imm); |
| } else { |
| ASSERT(reg != TMP); |
| LoadImmediate(TMP, imm); |
| imulq(reg, TMP); |
| } |
| } |
| |
| |
| void Assembler::imulq(Register dst, const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, address, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xAF); |
| EmitOperand(dst & 7, address); |
| } |
| |
| |
| void Assembler::mulq(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(reg, REX_W); |
| EmitUint8(0xF7); |
| EmitOperand(4, Operand(reg)); |
| } |
| |
| |
| void Assembler::subq(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x2B); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::subq(Register reg, const Immediate& imm) { |
| if (imm.is_int32()) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(reg, REX_W); |
| EmitComplex(5, Operand(reg), imm); |
| } else { |
| ASSERT(reg != TMP); |
| movq(TMP, imm); |
| subq(reg, TMP); |
| } |
| } |
| |
| |
| void Assembler::subq(Register reg, const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(reg, address, REX_W); |
| EmitUint8(0x2B); |
| EmitOperand(reg & 7, address); |
| } |
| |
| |
| void Assembler::subq(const Address& address, Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(reg, address, REX_W); |
| EmitUint8(0x29); |
| EmitOperand(reg & 7, address); |
| } |
| |
| |
| void Assembler::subq(const Address& address, const Immediate& imm) { |
| if (imm.is_int32()) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(0, address, REX_W); |
| EmitComplex(5, Operand(address), imm); |
| } else { |
| movq(TMP, imm); |
| subq(address, TMP); |
| } |
| } |
| |
| |
| void Assembler::sbbq(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x1B); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::sbbq(Register dst, const Immediate& imm) { |
| if (imm.is_int32()) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(dst, REX_W); |
| EmitComplex(3, Operand(dst), imm); |
| } else { |
| ASSERT(dst != TMP); |
| movq(TMP, imm); |
| sbbq(dst, TMP); |
| } |
| } |
| |
| |
| void Assembler::sbbq(Register dst, const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(dst, address, REX_W); |
| EmitUint8(0x1B); |
| EmitOperand(dst & 7, address); |
| } |
| |
| |
| void Assembler::shll(Register reg, const Immediate& imm) { |
| EmitGenericShift(false, 4, reg, imm); |
| } |
| |
| |
| void Assembler::shll(Register operand, Register shifter) { |
| EmitGenericShift(false, 4, operand, shifter); |
| } |
| |
| |
| void Assembler::shrl(Register reg, const Immediate& imm) { |
| EmitGenericShift(false, 5, reg, imm); |
| } |
| |
| |
| void Assembler::shrl(Register operand, Register shifter) { |
| EmitGenericShift(false, 5, operand, shifter); |
| } |
| |
| |
| void Assembler::sarl(Register reg, const Immediate& imm) { |
| EmitGenericShift(false, 7, reg, imm); |
| } |
| |
| |
| void Assembler::sarl(Register operand, Register shifter) { |
| EmitGenericShift(false, 7, operand, shifter); |
| } |
| |
| |
| void Assembler::shldl(Register dst, Register src, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| ASSERT(imm.is_int8()); |
| Operand operand(dst); |
| EmitOperandREX(src, operand, REX_NONE); |
| EmitUint8(0x0F); |
| EmitUint8(0xA4); |
| EmitOperand(src & 7, operand); |
| EmitUint8(imm.value() & 0xFF); |
| } |
| |
| |
| void Assembler::shlq(Register reg, const Immediate& imm) { |
| EmitGenericShift(true, 4, reg, imm); |
| } |
| |
| |
| void Assembler::shlq(Register operand, Register shifter) { |
| EmitGenericShift(true, 4, operand, shifter); |
| } |
| |
| |
| void Assembler::shrq(Register reg, const Immediate& imm) { |
| EmitGenericShift(true, 5, reg, imm); |
| } |
| |
| |
| void Assembler::shrq(Register operand, Register shifter) { |
| EmitGenericShift(true, 5, operand, shifter); |
| } |
| |
| |
| void Assembler::sarq(Register reg, const Immediate& imm) { |
| EmitGenericShift(true, 7, reg, imm); |
| } |
| |
| |
| void Assembler::sarq(Register operand, Register shifter) { |
| EmitGenericShift(true, 7, operand, shifter); |
| } |
| |
| |
| void Assembler::shldq(Register dst, Register src, const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| ASSERT(imm.is_int8()); |
| Operand operand(dst); |
| EmitOperandREX(src, operand, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xA4); |
| EmitOperand(src & 7, operand); |
| EmitUint8(imm.value() & 0xFF); |
| } |
| |
| |
| void Assembler::shldq(Register dst, Register src, Register shifter) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| ASSERT(shifter == RCX); |
| Operand operand(dst); |
| EmitOperandREX(src, operand, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xA5); |
| EmitOperand(src & 7, operand); |
| } |
| |
| |
| void Assembler::shrdq(Register dst, Register src, Register shifter) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| ASSERT(shifter == RCX); |
| Operand operand(dst); |
| EmitOperandREX(src, operand, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xAD); |
| EmitOperand(src & 7, operand); |
| } |
| |
| |
| void Assembler::incl(const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(address); |
| EmitOperandREX(0, operand, REX_NONE); |
| EmitUint8(0xFF); |
| EmitOperand(0, operand); |
| } |
| |
| |
| void Assembler::decl(const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(address); |
| EmitOperandREX(1, operand, REX_NONE); |
| EmitUint8(0xFF); |
| EmitOperand(1, operand); |
| } |
| |
| |
| void Assembler::incq(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(reg); |
| EmitOperandREX(0, operand, REX_W); |
| EmitUint8(0xFF); |
| EmitOperand(0, operand); |
| } |
| |
| |
| void Assembler::incq(const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(address); |
| EmitOperandREX(0, operand, REX_W); |
| EmitUint8(0xFF); |
| EmitOperand(0, operand); |
| } |
| |
| |
| void Assembler::decq(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(reg); |
| EmitOperandREX(1, operand, REX_W); |
| EmitUint8(0xFF); |
| EmitOperand(1, operand); |
| } |
| |
| |
| void Assembler::decq(const Address& address) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(address); |
| EmitOperandREX(1, operand, REX_W); |
| EmitUint8(0xFF); |
| EmitOperand(1, operand); |
| } |
| |
| |
| void Assembler::negl(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(reg, REX_NONE); |
| EmitUint8(0xF7); |
| EmitOperand(3, Operand(reg)); |
| } |
| |
| |
| void Assembler::negq(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(reg, REX_W); |
| EmitUint8(0xF7); |
| EmitOperand(3, Operand(reg)); |
| } |
| |
| |
| void Assembler::notl(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(reg, REX_NONE); |
| EmitUint8(0xF7); |
| EmitUint8(0xD0 | (reg & 7)); |
| } |
| |
| |
| void Assembler::notq(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(reg, REX_W); |
| EmitUint8(0xF7); |
| EmitUint8(0xD0 | (reg & 7)); |
| } |
| |
| |
| void Assembler::bsrq(Register dst, Register src) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(src); |
| EmitOperandREX(dst, operand, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xBD); |
| EmitOperand(dst & 7, operand); |
| } |
| |
| |
| void Assembler::btq(Register base, Register offset) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(base); |
| EmitOperandREX(offset, operand, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xA3); |
| EmitOperand(offset & 7, operand); |
| } |
| |
| |
| void Assembler::enter(const Immediate& imm) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xC8); |
| ASSERT(imm.is_uint16()); |
| EmitUint8(imm.value() & 0xFF); |
| EmitUint8((imm.value() >> 8) & 0xFF); |
| EmitUint8(0x00); |
| } |
| |
| |
| void Assembler::leave() { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xC9); |
| } |
| |
| |
| void Assembler::ret() { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xC3); |
| } |
| |
| |
| void Assembler::nop(int size) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| // There are nops up to size 15, but for now just provide up to size 8. |
| ASSERT(0 < size && size <= MAX_NOP_SIZE); |
| switch (size) { |
| case 1: |
| EmitUint8(0x90); |
| break; |
| case 2: |
| EmitUint8(0x66); |
| EmitUint8(0x90); |
| break; |
| case 3: |
| EmitUint8(0x0F); |
| EmitUint8(0x1F); |
| EmitUint8(0x00); |
| break; |
| case 4: |
| EmitUint8(0x0F); |
| EmitUint8(0x1F); |
| EmitUint8(0x40); |
| EmitUint8(0x00); |
| break; |
| case 5: |
| EmitUint8(0x0F); |
| EmitUint8(0x1F); |
| EmitUint8(0x44); |
| EmitUint8(0x00); |
| EmitUint8(0x00); |
| break; |
| case 6: |
| EmitUint8(0x66); |
| EmitUint8(0x0F); |
| EmitUint8(0x1F); |
| EmitUint8(0x44); |
| EmitUint8(0x00); |
| EmitUint8(0x00); |
| break; |
| case 7: |
| EmitUint8(0x0F); |
| EmitUint8(0x1F); |
| EmitUint8(0x80); |
| EmitUint8(0x00); |
| EmitUint8(0x00); |
| EmitUint8(0x00); |
| EmitUint8(0x00); |
| break; |
| case 8: |
| EmitUint8(0x0F); |
| EmitUint8(0x1F); |
| EmitUint8(0x84); |
| EmitUint8(0x00); |
| EmitUint8(0x00); |
| EmitUint8(0x00); |
| EmitUint8(0x00); |
| EmitUint8(0x00); |
| break; |
| default: |
| UNIMPLEMENTED(); |
| } |
| } |
| |
| |
| void Assembler::int3() { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xCC); |
| } |
| |
| |
| void Assembler::hlt() { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF4); |
| } |
| |
| |
| void Assembler::j(Condition condition, Label* label, bool near) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| if (VerifiedMemory::enabled()) { |
| near = Assembler::kFarJump; |
| } |
| if (label->IsBound()) { |
| static const int kShortSize = 2; |
| static const int kLongSize = 6; |
| intptr_t offset = label->Position() - buffer_.Size(); |
| ASSERT(offset <= 0); |
| if (Utils::IsInt(8, offset - kShortSize)) { |
| EmitUint8(0x70 + condition); |
| EmitUint8((offset - kShortSize) & 0xFF); |
| } else { |
| EmitUint8(0x0F); |
| EmitUint8(0x80 + condition); |
| EmitInt32(offset - kLongSize); |
| } |
| } else if (near) { |
| EmitUint8(0x70 + condition); |
| EmitNearLabelLink(label); |
| } else { |
| EmitUint8(0x0F); |
| EmitUint8(0x80 + condition); |
| EmitLabelLink(label); |
| } |
| } |
| |
| |
| void Assembler::J(Condition condition, |
| const StubEntry& stub_entry, |
| Register pp) { |
| Label no_jump; |
| // Negate condition. |
| j(static_cast<Condition>(condition ^ 1), &no_jump, kNearJump); |
| Jmp(stub_entry, pp); |
| Bind(&no_jump); |
| } |
| |
| |
| void Assembler::jmp(Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| Operand operand(reg); |
| EmitOperandREX(4, operand, REX_NONE); |
| EmitUint8(0xFF); |
| EmitOperand(4, operand); |
| } |
| |
| |
| void Assembler::jmp(const Address& dst) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(4, dst, REX_NONE); |
| EmitUint8(0xFF); |
| EmitOperand(4, dst); |
| } |
| |
| |
| void Assembler::jmp(Label* label, bool near) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| if (VerifiedMemory::enabled()) { |
| near = Assembler::kFarJump; |
| } |
| if (label->IsBound()) { |
| static const int kShortSize = 2; |
| static const int kLongSize = 5; |
| intptr_t offset = label->Position() - buffer_.Size(); |
| ASSERT(offset <= 0); |
| if (Utils::IsInt(8, offset - kShortSize)) { |
| EmitUint8(0xEB); |
| EmitUint8((offset - kShortSize) & 0xFF); |
| } else { |
| EmitUint8(0xE9); |
| EmitInt32(offset - kLongSize); |
| } |
| } else if (near) { |
| EmitUint8(0xEB); |
| EmitNearLabelLink(label); |
| } else { |
| EmitUint8(0xE9); |
| EmitLabelLink(label); |
| } |
| } |
| |
| |
| void Assembler::jmp(const ExternalLabel* label) { |
| { // Encode movq(TMP, Immediate(label->address())), but always as imm64. |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitRegisterREX(TMP, REX_W); |
| EmitUint8(0xB8 | (TMP & 7)); |
| EmitInt64(label->address()); |
| } |
| jmp(TMP); |
| } |
| |
| |
| void Assembler::JmpPatchable(const StubEntry& stub_entry, Register pp) { |
| ASSERT((pp != PP) || constant_pool_allowed()); |
| const Code& target = Code::Handle(stub_entry.code()); |
| const int32_t offset = ObjectPool::element_offset( |
| object_pool_wrapper_.FindObject(target, kPatchable)); |
| movq(CODE_REG, Address::AddressBaseImm32(pp, offset - kHeapObjectTag)); |
| movq(TMP, FieldAddress(CODE_REG, Code::entry_point_offset())); |
| jmp(TMP); |
| } |
| |
| |
| void Assembler::Jmp(const StubEntry& stub_entry, Register pp) { |
| ASSERT((pp != PP) || constant_pool_allowed()); |
| const Code& target = Code::Handle(stub_entry.code()); |
| const int32_t offset = ObjectPool::element_offset( |
| object_pool_wrapper_.FindObject(target, kNotPatchable)); |
| movq(CODE_REG, FieldAddress(pp, offset)); |
| movq(TMP, FieldAddress(CODE_REG, Code::entry_point_offset())); |
| jmp(TMP); |
| } |
| |
| |
| void Assembler::lock() { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0xF0); |
| } |
| |
| |
| void Assembler::cmpxchgl(const Address& address, Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(reg, address, REX_NONE); |
| EmitUint8(0x0F); |
| EmitUint8(0xB1); |
| EmitOperand(reg & 7, address); |
| } |
| |
| |
| void Assembler::cmpxchgq(const Address& address, Register reg) { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitOperandREX(reg, address, REX_W); |
| EmitUint8(0x0F); |
| EmitUint8(0xB1); |
| EmitOperand(reg & 7, address); |
| } |
| |
| |
| void Assembler::cpuid() { |
| AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
| EmitUint8(0x0F); |
| EmitUint8(0xA2); |
| } |
| |
| |
| void Assembler::CompareRegisters(Register a, Register b) { |
| cmpq(a, b); |
| } |
| |
| |
| void Assembler::MoveRegister(Register to, Register from) { |
| if (to != from) { |
| movq(to, from); |
| } |
| } |
| |
| |
| void Assembler::PopRegister(Register r) { |
| popq(r); |
| } |
| |
| |
| void Assembler::AddImmediate(Register reg, const Immediate& imm) { |
| const int64_t value = imm.value(); |
| if (value == 0) { |
| return; |
| } |
| if ((value > 0) || (value == kMinInt64)) { |
| if (value == 1) { |
| incq(reg); |
| } else { |
| if (imm.is_int32()) { |
| addq(reg, imm); |
| } else { |
| ASSERT(reg != TMP); |
| LoadImmediate(TMP, imm); |
| addq(reg, TMP); |
| } |
| } |
| } else { |
| SubImmediate(reg, Immediate(-value)); |
| } |
| } |
| |
| |
| void Assembler::AddImmediate(const Address& address, const Immediate& imm) { |
| const int64_t value = imm.value(); |
| if (value == 0) { |
| return; |
| } |
| if ((value > 0) || (value == kMinInt64)) { |
| if (value == 1) { |
| incq(address); |
| } else { |
| if (imm.is_int32()) { |
| addq(address, imm); |
| } else { |
| LoadImmediate(TMP, imm); |
| addq(address, TMP); |
| } |
| } |
| } else { |
| SubImmediate(address, Immediate(-value)); |
| } |
| } |
| |
| |
| void Assembler::SubImmediate(Register reg, const Immediate& imm) { |
| const int64_t value = imm.value(); |
| if (value == 0) { |
| return; |
| } |
| if ((value > 0) || (value == kMinInt64)) { |
| if (value == 1) { |
| decq(reg); |
| } else { |
| if (imm.is_int32()) { |
| subq(reg, imm); |
| } else { |
| ASSERT(reg != TMP); |
| LoadImmediate(TMP, imm); |
| subq(reg, TMP); |
| } |
| } |
| } else { |
| AddImmediate(reg, Immediate(-value)); |
| } |
| } |
| |
| |
| void Assembler::SubImmediate(const Address& address, const Immediate& imm) { |
| const int64_t value = imm.value(); |
| if (value == 0) { |
| return; |
| } |
| if ((value > 0) || (value == kMinInt64)) { |
| if (value == 1) { |
| decq(address); |
| } else { |
| if (imm.is_int32()) { |
| subq(address, imm); |
| } else { |
| LoadImmediate(TMP, imm); |
| subq(address, TMP); |
| } |
| } |
| } else { |
| AddImmediate(address, Immediate(-value)); |
| } |
| } |
| |
| |
| void Assembler::Drop(intptr_t stack_elements, Register tmp) { |
| ASSERT(stack_elements >= 0); |
| if (stack_elements <= 4) { |
| for (intptr_t i = 0; i < stack_elements; i++) { |
| popq(tmp); |
| } |
| return; |
| } |
| addq(RSP, Immediate(stack_elements * kWordSize)); |
| } |
| |
| |
| bool Assembler::CanLoadFromObjectPool(const Object& object) const { |
| ASSERT(!Thread::CanLoadFromThread(object)); |
| if (!constant_pool_allowed()) { |
| return false; |
| } |
| |
| // TODO(zra, kmillikin): Also load other large immediates from the object |
| // pool |
| if (object.IsSmi()) { |
| // If the raw smi does not fit into a 32-bit signed int, then we'll keep |
| // the raw value in the object pool. |
| return !Utils::IsInt(32, reinterpret_cast<int64_t>(object.raw())); |
| } |
| ASSERT(object.IsNotTemporaryScopedHandle()); |
| ASSERT(object.IsOld()); |
| return true; |
| } |
| |
| |
| void Assembler::LoadWordFromPoolOffset(Register dst, int32_t offset) { |
| ASSERT(constant_pool_allowed()); |
| ASSERT(dst != PP); |
| // This sequence must be of fixed size. AddressBaseImm32 |
| // forces the address operand to use a fixed-size imm32 encoding. |
| movq(dst, Address::AddressBaseImm32(PP, offset)); |
| } |
| |
| |
| void Assembler::LoadIsolate(Register dst) { |
| movq(dst, Address(THR, Thread::isolate_offset())); |
| } |
| |
| |
| void Assembler::LoadObjectHelper(Register dst, |
| const Object& object, |
| bool is_unique) { |
| if (Thread::CanLoadFromThread(object)) { |
| movq(dst, Address(THR, Thread::OffsetFromThread(object))); |
| } else if (CanLoadFromObjectPool(object)) { |
| const int32_t offset = ObjectPool::element_offset( |
| is_unique ? object_pool_wrapper_.AddObject(object) |
| : object_pool_wrapper_.FindObject(object)); |
| LoadWordFromPoolOffset(dst, offset - kHeapObjectTag); |
| } else { |
| ASSERT(object.IsSmi() || object.InVMHeap()); |
| ASSERT(object.IsSmi() || FLAG_allow_absolute_addresses); |
| LoadImmediate(dst, Immediate(reinterpret_cast<int64_t>(object.raw()))); |
| } |
| } |
| |
| |
| void Assembler::LoadFunctionFromCalleePool(Register dst, |
| const Function& function, |
| Register new_pp) { |
| ASSERT(!constant_pool_allowed()); |
| ASSERT(new_pp != PP); |
| const int32_t offset = |
| ObjectPool::element_offset(object_pool_wrapper_.FindObject(function)); |
| movq(dst, Address::AddressBaseImm32(new_pp, offset - kHeapObjectTag)); |
| } |
| |
| |
| void Assembler::LoadObject(Register dst, const Object& object) { |
| LoadObjectHelper(dst, object, false); |
| } |
| |
| |
| void Assembler::LoadUniqueObject(Register dst, const Object& object) { |
| LoadObjectHelper(dst, object, true); |
| } |
| |
| |
| void Assembler::StoreObject(const Address& dst, const Object& object) { |
| if (Thread::CanLoadFromThread(object)) { |
| movq(TMP, Address(THR, Thread::OffsetFromThread(object))); |
| movq(dst, TMP); |
| } else if (CanLoadFromObjectPool(object)) { |
| LoadObject(TMP, object); |
| movq(dst, TMP); |
| } else { |
| ASSERT(object.IsSmi() || FLAG_allow_absolute_addresses); |
| MoveImmediate(dst, Immediate(reinterpret_cast<int64_t>(object.raw()))); |
| } |
| } |
| |
| |
| void Assembler::PushObject(const Object& object) { |
| if (Thread::CanLoadFromThread(object)) { |
| pushq(Address(THR, Thread::OffsetFromThread(object))); |
| } else if (CanLoadFromObjectPool(object)) { |
| LoadObject(TMP, object); |
| pushq(TMP); |
| } else { |
| ASSERT(object.IsSmi() || FLAG_allow_absolute_addresses); |
| PushImmediate(Immediate(reinterpret_cast<int64_t>(object.raw()))); |
| } |
| } |
| |
| |
| void Assembler::CompareObject(Register reg, const Object& object) { |
| if (Thread::CanLoadFromThread(object)) { |
| cmpq(reg, Address(THR, Thread::OffsetFromThread(object))); |
| } else if (CanLoadFromObjectPool(object)) { |
| const int32_t offset = |
| ObjectPool::element_offset(object_pool_wrapper_.FindObject(object)); |
| cmpq(reg, Address(PP, offset-kHeapObjectTag)); |
| } else { |
| ASSERT(object.IsSmi() || FLAG_allow_absolute_addresses); |
| CompareImmediate( |
| reg, Immediate(reinterpret_cast<int64_t>(object.raw()))); |
| } |
| } |
| |
| |
| intptr_t Assembler::FindImmediate(int64_t imm) { |
| return object_pool_wrapper_.FindImmediate(imm); |
| } |
| |
| |
| void Assembler::LoadImmediate(Register reg, const Immediate& imm) { |
| if (imm.is_int32() || !constant_pool_allowed()) { |
| movq(reg, imm); |
| } else { |
| int32_t offset = ObjectPool:: |